diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-04-18 19:40:27 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-04-29 14:55:39 +0300 |
| commit | 6e6f7c00fd860cc61e28e47286118e590f2a4563 (patch) | |
| tree | 0428c9ac8e11ff8bf296513de94ce133e4bdac38 | |
| parent | 9f49df1ad3ba49d479aa9a1ff997d2236509163b (diff) | |
lib/rendercopy: Add fp16 support for gen4+
Allow copying between fp16 surfaces. We'll use the FLOAT
surface format since that's all the display supports currently.
Hopefully the hardware gives us a 1:1 copy, at least if
the input doesn't contain crazy infs/nans etc. We could
choose UNORM instead but that won't work for eventually
exposing fp16+ccs. Although we do need to replace the
simple bpp value with a more specific format type to get
10bpc+ccs working as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
| -rw-r--r-- | lib/rendercopy_gen4.c | 1 | ||||
| -rw-r--r-- | lib/rendercopy_gen6.c | 1 | ||||
| -rw-r--r-- | lib/rendercopy_gen7.c | 1 | ||||
| -rw-r--r-- | lib/rendercopy_gen8.c | 1 | ||||
| -rw-r--r-- | lib/rendercopy_gen9.c | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/lib/rendercopy_gen4.c b/lib/rendercopy_gen4.c index 9111508f..42de77f9 100644 --- a/lib/rendercopy_gen4.c +++ b/lib/rendercopy_gen4.c @@ -160,6 +160,7 @@ gen4_bind_buf(struct intel_batchbuffer *batch, case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break; case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break; case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break; + case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; default: igt_assert(0); } diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c index a6157cfc..b90466d0 100644 --- a/lib/rendercopy_gen6.c +++ b/lib/rendercopy_gen6.c @@ -97,6 +97,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break; case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break; case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break; + case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; default: igt_assert(0); } diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c index 0a5d4a15..94946842 100644 --- a/lib/rendercopy_gen7.c +++ b/lib/rendercopy_gen7.c @@ -73,6 +73,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch, case 8: format = SURFACEFORMAT_R8_UNORM; break; case 16: format = SURFACEFORMAT_R8G8_UNORM; break; case 32: format = SURFACEFORMAT_B8G8R8A8_UNORM; break; + case 64: format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; default: igt_assert(0); } diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c index 643b6630..f7a33947 100644 --- a/lib/rendercopy_gen8.c +++ b/lib/rendercopy_gen8.c @@ -170,6 +170,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break; case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break; case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break; + case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; default: igt_assert(0); } ss->ss0.render_cache_read_write = 1; diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 93e9d150..5c6485d7 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -201,6 +201,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf, case 8: ss->ss0.surface_format = SURFACEFORMAT_R8_UNORM; break; case 16: ss->ss0.surface_format = SURFACEFORMAT_R8G8_UNORM; break; case 32: ss->ss0.surface_format = SURFACEFORMAT_B8G8R8A8_UNORM; break; + case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break; default: igt_assert(0); } ss->ss0.render_cache_read_write = 1; |