diff options
| author | Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> | 2020-07-06 15:08:42 +0200 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-07-06 18:35:17 +0100 |
| commit | 41e2dcb9bfd83f9a04dfb78073d25bc0d868a896 (patch) | |
| tree | efad9d19ae0ad43a6cec3af3766405f40a5b774f /lib/intel_batchbuffer.c | |
| parent | a4d83701bd493a43747780321d404dc2163378df (diff) | |
lib/bufops: add surface array to cover ccs pgtable
Rendercopy for gen12+ requires additional aux pgtable. Alter bufops
and tests to use surface[] and ccs[] instead aux. This step is
required to properly rewrite handling aux pgtable to use with
intel_bb.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'lib/intel_batchbuffer.c')
| -rw-r--r-- | lib/intel_batchbuffer.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index b6ca8e25..57fdbbbc 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -2030,8 +2030,8 @@ void intel_bb_emit_blt_copy(struct intel_bb *ibb, igt_assert(bpp*(src_x1 + width) <= 8*src_pitch); igt_assert(bpp*(dst_x1 + width) <= 8*dst_pitch); - igt_assert(src_pitch * (src_y1 + height) <= src->size); - igt_assert(dst_pitch * (dst_y1 + height) <= dst->size); + igt_assert(src_pitch * (src_y1 + height) <= src->surface[0].size); + igt_assert(dst_pitch * (dst_y1 + height) <= dst->surface[0].size); if (gen >= 4 && src->tiling != I915_TILING_NONE) { src_pitch /= 4; |