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authorImre Deak <imre.deak@intel.com>2019-11-29 12:38:38 +0200
committerImre Deak <imre.deak@intel.com>2019-12-09 10:29:05 +0200
commit7d1e37eca2323073d462751ad7f0218665e33d17 (patch)
tree410bd96307742278781c03dfe19dd42567be31be /lib/intel_batchbuffer.h
parentd45e11f8e10a4c5775372002ec89974ce3d97b27 (diff)
tests/gem_render_copy: Make subtest parameters more explicit
A follow-up patch will add more subtests with varying source and destination memory compression format and a way to force using the vebox engine instead of the render engine for blitting. Prepare for that by describing the compression types explicitly. Also add a flag for subtests that do a blit from multiple source buffers with different tilings into the destination buffer. This is not supported by the vebox copy function (added later) due to the restrictions on defining arbitrary source,destination surface regions for vebox blits. Cc: Mika Kahola <mika.kahola@intel.com> Cc: Brian Welty <brian.welty@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'lib/intel_batchbuffer.h')
-rw-r--r--lib/intel_batchbuffer.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index fc28dd55..888188f9 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -210,6 +210,11 @@ void intel_copy_bo(struct intel_batchbuffer *batch,
#define I915_TILING_Yf 3
#define I915_TILING_Ys 4
+enum i915_compression {
+ I915_COMPRESSION_NONE,
+ I915_COMPRESSION_RENDER,
+};
+
/**
* igt_buf:
* @bo: underlying libdrm buffer object