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authorTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>2021-02-11 16:06:07 +0530
committerPetri Latvala <petri.latvala@intel.com>2021-02-12 10:53:57 +0200
commitc251d12e5f2dc7c2c1e0d2c4d5eefd3b2d2206d7 (patch)
tree447ad5d6b85ad0c003492c08993c41af05304b8b /lib/intel_chipset.h
parent7db88cb99aba045ebe0f0946b557d68b19cf16cf (diff)
lib/adl_s: Add Alder Lake S platform definition
Adding Alder lake platform definitions Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Diffstat (limited to 'lib/intel_chipset.h')
-rw-r--r--lib/intel_chipset.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 63c98025..f766021e 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -76,6 +76,7 @@ struct intel_device_info {
bool is_tigerlake : 1;
bool is_rocketlake : 1;
bool is_dg1 : 1;
+ bool is_alderlake_s : 1;
const char *codename;
};
@@ -176,6 +177,7 @@ void intel_check_pch(void);
#define IS_TIGERLAKE(devid) (intel_get_device_info(devid)->is_tigerlake)
#define IS_ROCKETLAKE(devid) (intel_get_device_info(devid)->is_rocketlake)
#define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
+#define IS_ALDERLAKE_S(devid) (intel_get_device_info(devid)->is_alderlake_s)
#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u << ((x)-1)))
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u << ((x)-1)))