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authorDavid Zhang <dingchen.zhang@amd.com>2022-05-04 14:41:17 -0400
committerDavid Zhang <dingchen.zhang@amd.com>2022-05-05 13:44:41 -0400
commit929abc51cdd48d673efa03e025b1f31b557972ed (patch)
tree67177b0c310bc552ffa6ca66e622e5df5c74cd2a /tests/amdgpu
parent4e3a37b27cad645b15485403284eee5d03a9ada7 (diff)
tests/amdgpu/amd_bypass: skip if DSC is enabled on the connector
[why & how] Since the DSC is visually lossless but loss still exists after compression/decompression at source/destination sides. So for any bypass mode validation, which requires what received at sink is consistent to what is transmitted at source, DSC is required to be turned off. skip the test run if the DSC is enabled on the connector (output). Signed-off-by: David Zhang <dingchen.zhang@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Diffstat (limited to 'tests/amdgpu')
-rw-r--r--tests/amdgpu/amd_bypass.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/tests/amdgpu/amd_bypass.c b/tests/amdgpu/amd_bypass.c
index 75ad8521..5ec90884 100644
--- a/tests/amdgpu/amd_bypass.c
+++ b/tests/amdgpu/amd_bypass.c
@@ -21,6 +21,7 @@
*
*/
#include "igt.h"
+#include "igt_amd.h"
/*
* internal use
@@ -315,6 +316,14 @@ static void bypass_8bpc_test(data_t *data)
test_init(data);
+ /**
+ * 8bpc bypass only makes sense without DSC.
+ * DSC is visually lossless but actually still loss exists and any bypass mode
+ * cannot be run w/ DSC enabled.
+ */
+ igt_skip_on_f(igt_amd_read_dsc_clock_status(data->drm_fd, data->output->name) == 1,
+ "DSC enabled on %s and no sense to validate bypass mode\n", data->output->name);
+
igt_create_fb(data->drm_fd, data->width, data->height,
DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &fb);