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authorChris Wilson <chris@chris-wilson.co.uk>2020-05-12 09:06:31 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2020-05-12 09:08:37 +0100
commite54e2642f1967ca3c488db32264607df670d1dfb (patch)
tree79bb1fd76f3a912cd1d72a5675fa5490893e92ed /tests/i915/gem_exec_fence.c
parent0c5b0e37242449f1beb58245e6ad131d26ea1b5c (diff)
i915/gem_exec_(fence|schedule): Use WC mmaps
Since we are hiding our write hazards, gem_read() may not know if it needs to flush the CPU caches prior to reading back. As we lie to the kernel, use an explicit WC mmap for result readback. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1875 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tests/i915/gem_exec_fence.c')
-rw-r--r--tests/i915/gem_exec_fence.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 20ff2535..4140bff2 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -455,10 +455,12 @@ static void test_submit_fence(int i915, unsigned int engine)
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
};
- uint32_t result;
+ uint32_t *result;
int out;
obj.handle = timeslicing_batches(i915, &offset);
+ result = gem_mmap__device_coherent(i915, obj.handle,
+ 0, 4096, PROT_READ);
execbuf.flags = engine | I915_EXEC_FENCE_OUT;
execbuf.batch_start_offset = 0;
@@ -473,6 +475,7 @@ static void test_submit_fence(int i915, unsigned int engine)
gem_context_destroy(i915, execbuf.rsvd1);
gem_sync(i915, obj.handle);
+ gem_close(i915, obj.handle);
/* no hangs! */
out = execbuf.rsvd2;
@@ -483,9 +486,8 @@ static void test_submit_fence(int i915, unsigned int engine)
igt_assert_eq(sync_fence_status(out), 1);
close(out);
- gem_read(i915, obj.handle, 4000, &result, sizeof(result));
- igt_assert_eq(result, 16);
- gem_close(i915, obj.handle);
+ igt_assert_eq(result[1000], 16);
+ munmap(result, 4096);
}
}
@@ -528,6 +530,7 @@ static uint32_t submitN_batches(int i915, uint32_t offset, int count)
static void test_submitN(int i915, unsigned int engine, int count)
{
unsigned int offset = 24 << 20;
+ unsigned int sz = ALIGN((count + 1) * 1024, 4096);
struct drm_i915_gem_exec_object2 obj = {
.handle = submitN_batches(i915, offset, count),
.offset = offset,
@@ -538,8 +541,9 @@ static void test_submitN(int i915, unsigned int engine, int count)
.buffer_count = 1,
.flags = engine | I915_EXEC_FENCE_OUT,
};
+ uint32_t *result =
+ gem_mmap__device_coherent(i915, obj.handle, 0, sz, PROT_READ);
int fence[count];
- uint32_t result;
igt_require(gem_scheduler_has_semaphores(i915));
igt_require(gem_scheduler_has_preemption(i915));
@@ -557,6 +561,7 @@ static void test_submitN(int i915, unsigned int engine, int count)
}
gem_sync(i915, obj.handle);
+ gem_close(i915, obj.handle);
/* no hangs! */
for (int i = 0; i < count; i++) {
@@ -564,9 +569,8 @@ static void test_submitN(int i915, unsigned int engine, int count)
close(fence[i]);
}
- gem_read(i915, obj.handle, 0, &result, sizeof(result));
- igt_assert_eq(result, 8 * count);
- gem_close(i915, obj.handle);
+ igt_assert_eq(*result, 8 * count);
+ munmap(result, sz);
}
static void alarm_handler(int sig)