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authorImre Deak <imre.deak@intel.com>2019-12-29 20:25:43 +0200
committerImre Deak <imre.deak@intel.com>2019-12-31 14:44:07 +0200
commit7ff35cc1d0b3896b72ac6b1b223d84383549f7b9 (patch)
treed1d9d290ce7f32eb228a71cbcead4f07434d3f9c /tests/i915/gem_render_tiled_blits.c
parent86d7c631bcc7b0f4e4683cb753ad2eafc170a7da (diff)
lib/igt_buf: Extend igt_buf to include two color surfaces
UV FBs have two color surfaces so extend the igt_buf struct accordingly to support blitting such FBs. The patch is produced with the coccinelle patch below. No functional changes. @@ @@ struct igt_buf { ... - uint32_t stride; ... - uint32_t size; + struct { + uint32_t stride; + uint32_t size; + } surface[2]; ... }; @@ struct igt_buf b; @@ <... ( - b.stride + b.surface[0].stride | - b.size + b.surface[0].size ) ...> @@ struct igt_buf *b; @@ <... ( - b->size + b->surface[0].size | - b->stride + b->surface[0].stride ) ...> @@ identifier I; expression E1; expression E2; @@ ( struct igt_buf I = { - .size = E1, - .stride = E2, + .surface[0] = { + .size = E1, + .stride = E2, + }, }; | struct igt_buf I = { - .size = E1, + .surface[0] = { + .size = E1, + }, }; | struct igt_buf I = { - .stride = E1, + .surface[0] = { + .stride = E1, + }, }; ) v2: - Rebase on latest upstream. (Mika) Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'tests/i915/gem_render_tiled_blits.c')
-rw-r--r--tests/i915/gem_render_tiled_blits.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/i915/gem_render_tiled_blits.c b/tests/i915/gem_render_tiled_blits.c
index 14018329..1de1b72c 100644
--- a/tests/i915/gem_render_tiled_blits.c
+++ b/tests/i915/gem_render_tiled_blits.c
@@ -66,9 +66,9 @@ check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val)
int i;
tmp.bo = linear;
- tmp.stride = STRIDE;
+ tmp.surface[0].stride = STRIDE;
tmp.tiling = I915_TILING_NONE;
- tmp.size = SIZE;
+ tmp.surface[0].size = SIZE;
tmp.bpp = 32;
render_copy(batch, NULL, buf, 0, 0, WIDTH, HEIGHT, &tmp, 0, 0);
@@ -132,9 +132,9 @@ static void run_test (int fd, int count)
buf[i].bo = drm_intel_bo_alloc_tiled(bufmgr, "",
WIDTH, HEIGHT, 4,
&tiling, &pitch, 0);
- buf[i].stride = pitch;
+ buf[i].surface[0].stride = pitch;
buf[i].tiling = tiling;
- buf[i].size = SIZE;
+ buf[i].surface[0].size = SIZE;
buf[i].bpp = 32;
start_val[i] = start;