diff options
| author | Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> | 2020-07-06 15:08:42 +0200 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-07-06 18:35:17 +0100 |
| commit | 41e2dcb9bfd83f9a04dfb78073d25bc0d868a896 (patch) | |
| tree | efad9d19ae0ad43a6cec3af3766405f40a5b774f /tests/i915/i915_pm_sseu.c | |
| parent | a4d83701bd493a43747780321d404dc2163378df (diff) | |
lib/bufops: add surface array to cover ccs pgtable
Rendercopy for gen12+ requires additional aux pgtable. Alter bufops
and tests to use surface[] and ccs[] instead aux. This step is
required to properly rewrite handling aux pgtable to use with
intel_bb.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tests/i915/i915_pm_sseu.c')
| -rw-r--r-- | tests/i915/i915_pm_sseu.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/tests/i915/i915_pm_sseu.c b/tests/i915/i915_pm_sseu.c index 30b7cfec..1b428c9b 100644 --- a/tests/i915/i915_pm_sseu.c +++ b/tests/i915/i915_pm_sseu.c @@ -258,13 +258,14 @@ gem_get_target_spins(double dt) I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); ptr = gem_mmap__device_coherent(gem.drm_fd, gem.buf.handle, - 0, gem.buf.size, PROT_READ); + 0, gem.buf.surface[0].size, + PROT_READ); clock_gettime(CLOCK_MONOTONIC, &tdone); gem_check_spin(ptr, spins); - munmap(ptr, gem.buf.size); + munmap(ptr, gem.buf.surface[0].size); cur_dt = to_dt(&tstart, &tdone); if (cur_dt > dt) @@ -361,9 +362,9 @@ full_enable(void) gem_set_domain(gem.drm_fd, gem.buf.handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU); ptr = gem_mmap__device_coherent(gem.drm_fd, gem.buf.handle, - 0, gem.buf.size, PROT_READ); + 0, gem.buf.surface[0].size, PROT_READ); gem_check_spin(ptr, spins); - munmap(ptr, gem.buf.size); + munmap(ptr, gem.buf.surface[0].size); check_full_enable(&stat); } |