diff options
author | Mark Yacoub <markyacoub@google.com> | 2021-05-13 14:53:52 +0000 |
---|---|---|
committer | Petri Latvala <petri.latvala@intel.com> | 2021-05-18 10:01:02 +0300 |
commit | 15e11fc2ace7182ce0c39ad7ac5e9f608c4861cd (patch) | |
tree | 0c232baa9c9735ac7a0de21773bec108187085fb /tests/kms_panel_fitting.c | |
parent | aacb1384378131b87121219a6a7ccd8b8f1e5d8d (diff) |
tests/kms_panel_fitting: Move Intel GEN check under a is_i915_device
Encapsulate intel-only operations such as intel_get_drm_devid under a is_i915_device check.
This allows the subtests to run on non-i915 devices.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Diffstat (limited to 'tests/kms_panel_fitting.c')
-rw-r--r-- | tests/kms_panel_fitting.c | 61 |
1 files changed, 36 insertions, 25 deletions
diff --git a/tests/kms_panel_fitting.c b/tests/kms_panel_fitting.c index 398addeb..1623f34e 100644 --- a/tests/kms_panel_fitting.c +++ b/tests/kms_panel_fitting.c @@ -89,7 +89,7 @@ static void test_panel_fitting(data_t *d) for_each_pipe_with_valid_output(display, pipe, output) { drmModeModeInfo *mode, native_mode; - uint32_t devid = intel_get_drm_devid(display->drm_fd); + bool is_plane_scaling_active = true; /* Check that the "scaling mode" property has been set. */ if (!igt_output_has_prop(output, IGT_CONNECTOR_SCALING_MODE)) @@ -132,25 +132,26 @@ static void test_panel_fitting(data_t *d) igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200); igt_plane_set_position(d->plane2, 100, 100); - /* - * Most of gen7 and all of gen8 doesn't support plane scaling - * at all. - * - * gen9 pipe C has only 1 scaler shared with the crtc, which - * means pipe scaling can't work simultaneously with panel - * fitting. - * - * Since this is the legacy path, userspace has to know about - * the HW limitations, whereas atomic can ask. - */ - if (IS_GEN8(devid) || - (IS_GEN7(devid) && !IS_IVYBRIDGE(devid)) || - (IS_GEN9(devid) && pipe == PIPE_C)) - /* same as visible area of fb => no scaling */ - igt_plane_set_size(d->plane2, - d->fb2.width-200, - d->fb2.height-200); - else + if (is_i915_device(display->drm_fd)) { + uint32_t devid = intel_get_drm_devid(display->drm_fd); + /* + * Most of gen7 and all of gen8 doesn't support plane scaling + * at all. + * + * gen9 pipe C has only 1 scaler shared with the crtc, which + * means pipe scaling can't work simultaneously with panel + * fitting. + * + * Since this is the legacy path, userspace has to know about + * the HW limitations, whereas atomic can ask. + */ + if (IS_GEN8(devid) || + (IS_GEN7(devid) && !IS_IVYBRIDGE(devid)) || + (IS_GEN9(devid) && pipe == PIPE_C)) { + is_plane_scaling_active = false; + } + } + if (is_plane_scaling_active) { /* * different than visible area of fb => plane scaling * active @@ -158,6 +159,13 @@ static void test_panel_fitting(data_t *d) igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200); + } + else { + /* same as visible area of fb => no scaling */ + igt_plane_set_size(d->plane2, + d->fb2.width - 200, + d->fb2.height - 200); + } /* Plane scaling active (if possible), pfit off */ igt_display_commit2(display, COMMIT_UNIVERSAL); @@ -229,13 +237,16 @@ static void test_atomic_fastset(data_t *data) int valid_tests = 0; struct stat sb; - /* Until this is force enabled, force modeset evasion. */ - if (stat("/sys/module/i915/parameters/fastboot", &sb) == 0) - igt_set_module_param_int(data->drm_fd, "fastboot", 1); - igt_require(display->is_atomic); - igt_require(intel_gen(intel_get_drm_devid(display->drm_fd)) >= 5); + if (is_i915_device(display->drm_fd)) { + /* Until this is force enabled, force modeset evasion. */ + if (stat("/sys/module/i915/parameters/fastboot", &sb) == 0) + igt_set_module_param_int(data->drm_fd, "fastboot", 1); + igt_require(intel_gen(intel_get_drm_devid(display->drm_fd)) >= 5); + } + + igt_require(display->is_atomic); for_each_pipe_with_valid_output(display, pipe, output) { if (!igt_output_has_prop(output, IGT_CONNECTOR_SCALING_MODE)) continue; |