diff options
Diffstat (limited to 'assembler')
| -rw-r--r-- | assembler/brw_defines.h | 2 | ||||
| -rw-r--r-- | assembler/gen8_instruction.c | 20 | ||||
| -rw-r--r-- | assembler/gen8_instruction.h | 2 | ||||
| -rw-r--r-- | assembler/gram.y | 16 |
4 files changed, 38 insertions, 2 deletions
diff --git a/assembler/brw_defines.h b/assembler/brw_defines.h index 6ca3e171..24e5e303 100644 --- a/assembler/brw_defines.h +++ b/assembler/brw_defines.h @@ -1647,4 +1647,6 @@ enum brw_wm_barycentric_interp_mode { #define EX_DESC_SFID_MASK 0xF #define EX_DESC_EOT_MASK 0x20 +#define EX_DESC_FUNC_MASK 0xFFFFFFC0 + #endif diff --git a/assembler/gen8_instruction.c b/assembler/gen8_instruction.c index 31c15ca3..fe0067e0 100644 --- a/assembler/gen8_instruction.c +++ b/assembler/gen8_instruction.c @@ -423,3 +423,23 @@ gen8_set_dp_message(struct gen8_instruction *inst, gen8_set_function_control(inst, binding_table_index | msg_type << 14 | msg_control << 8); } + + +void +gen9_set_send_extdesc(struct gen8_instruction *inst, + unsigned int value) +{ + unsigned int extdesc; + + extdesc = (value >> 16) & 0x0f; + gen8_set_bits(inst, 67, 64, extdesc); + + extdesc = (value >> 20) & 0x0f; + gen8_set_bits(inst, 83, 80, extdesc); + + extdesc = (value >> 24) & 0x0f; + gen8_set_bits(inst, 88, 85, extdesc); + + extdesc = (value >> 28) & 0x0f; + gen8_set_bits(inst, 94, 91, extdesc); +} diff --git a/assembler/gen8_instruction.h b/assembler/gen8_instruction.h index 5e72e457..7db47466 100644 --- a/assembler/gen8_instruction.h +++ b/assembler/gen8_instruction.h @@ -357,4 +357,6 @@ gen8_set_bits(struct gen8_instruction *insn, insn->data[word] = (insn->data[word] & ~mask) | ((value << low) & mask); } +void gen9_set_send_extdesc(struct gen8_instruction *insn, unsigned int value); + #endif diff --git a/assembler/gram.y b/assembler/gram.y index 96893529..23e1a576 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -1190,7 +1190,11 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget YYERROR; } - if (IS_GENp(8)) { + if (IS_GENp(9)) { + gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); + gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); + gen9_set_send_extdesc(GEN8(&$$), 0); + } else if (IS_GENp(8)) { gen8_set_src1_reg_file(GEN8(&$$), BRW_IMMEDIATE_VALUE); gen8_set_src1_reg_type(GEN8(&$$), BRW_REGISTER_TYPE_D); } else { @@ -1308,7 +1312,11 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget set_instruction_src0(&$$, &src0, NULL); set_instruction_src1(&$$, &$7, NULL); - if (IS_GENp(8)) { + if (IS_GENp(9)) { + gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); + gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); + gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); + } else if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); } else { @@ -1358,6 +1366,10 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget if (IS_GENp(8)) { gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); + gen9_set_send_extdesc(GEN8(&$$), $6 & EX_DESC_FUNC_MASK); + } else if (IS_GENp(8)) { + gen8_set_sfid(GEN8(&$$), $6 & EX_DESC_SFID_MASK); + gen8_set_eot(GEN8(&$$), !!($6 & EX_DESC_EOT_MASK)); } else { GEN(&$$)->header.destreg__conditionalmod = ($6 & EX_DESC_SFID_MASK); /* SFID */ GEN(&$$)->bits3.generic_gen5.end_of_thread = !!($6 & EX_DESC_EOT_MASK); |