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This code is supposedly checking of the given register is nr=0 in ARF but
was instead checking twice if the register is anything in ARF.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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We need to map the type to the 3src encoding before comparing to
insn->bits1.da3src.src_reg_type, which is 3src encoded.
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \
-e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \
-e 's/GLshort/int16_t/g' assembler/*.[ch]
Drop the GL types here, they don't bring anything to the table. For
instance, GLuint has no guarantee to be 32 bits, so it does not make too
much sense to use it in structure describing hardware tables and
opcodes.
Of course, some bikeshedding can be applied to use uin32_t instead, I
figured that some of the GLuint are used without size constraints, so
a sed with uint32_t did not seem the right thing to do. On top of that
initial sed, one bothered enough could change the structures with size
constraints to actually use uint32_t.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The assembler allows people to do that and that's something available
since Crestline.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Unfortunately, it's all a walk in the park. Both, internal code in the
assembler and external shaders (libva) generate registers that trigger
assertions in brw_eu_emit.c's brw_validate().
To fix all that I took the option to be able to emit warning with the -W
flag but still make the assembler generate the same opcodes.
We can fix all this, but it requires validation, something that I cannot
do right now.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Of course the assertion is there to make sure GRF and MRF have a reg.nr
< 128. To exclude ARF registers, reg.file has be checked, not reg.type
(channel type). Most likely a typo never caught.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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See the IVB PRM, vol4 part3 5.2.3.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Finally importing the meaty brw_eu_emit.c code that emit instructions.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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