| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2014-05-19 | assembler: distinguish the channel of .z from the condition of .z | Xiang, Haihao | |
| The scratch patch only works for generic register Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631 Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> | |||
| 2014-02-06 | assembler: define YY_NO_INPUT to prevent unused symbol warnings | Thomas Wood | |
| Signed-off-by: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> | |||
| 2013-05-22 | assembler: Add support for the SENDC instruction. | Matt Turner | |
| Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> | |||
| 2013-03-04 | assembler: Add location support | Damien Lespiau | |
| Let's generate location information about the tokens we are parsing. This can be used to give accurate location when reporting errors and warnings. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> | |||
| 2013-03-04 | build: Integrate the merged gen assembler in the build system | Damien Lespiau | |
| Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> | |||
| 2013-03-04 | Add autotools build system, and rearrange directory layout. | Eric Anholt | |
| 2013-03-04 | Add support for register-indirect access in destination registers. | Eric Anholt | |
| This is untested. Also, a few bits for source operand register-indirect access sneak in with this commit. | |||
| 2013-03-04 | Avoid shift/reduce conflict in predicate by making flagreg and subreg 1 token. | Eric Anholt | |
| Thanks to keithp for pointing out where the conflict was. | |||
| 2013-03-04 | Add support for predicate control. | Eric Anholt | |
| This is untested on programs using predicate control, and also causes a shift/reduce conflict. | |||
| 2013-03-04 | Add support for swizzle control on source operands. | Eric Anholt | |
| This required restructuring to store source operands in a new structure rather than being stored in instructions, as swizzle is align16-only and shares storage with other fields for align1 mode. These changes were not tested on real programs using swizzle. | |||
| 2013-03-04 | Add support for more instruction options. | Eric Anholt | |
| 2013-03-04 | Add rules for more registers, and use some for destinations. | Eric Anholt | |
| 2013-03-04 | Add many more opcodes. | Eric Anholt | |
| 2013-03-04 | Lex the register number with the register name. | Eric Anholt | |
| This avoids the need for a start condition to prevent for example g1.8<0,1,0>UW being lexed as GENREG NUMBER LANGLE etc. rather than GENREG INTEGER DOT INTEGER LANGLE etc. | |||
| 2013-03-04 | Add syntax for extended math send functions, and adjust packed_yuv_sf for it. | Eric Anholt | |
| 2013-03-04 | Add a syntax for urb write messages. | Eric Anholt | |
| 2013-03-04 | Add support for negate and abs to source operands. | Eric Anholt | |
| 2013-03-04 | C warnings cleanup. | Eric Anholt | |
| 2013-03-04 | Get the wm program to parse. | Eric Anholt | |
| 2013-03-04 | Initial gen4asm code. | Eric Anholt | |
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index : igt-gpu-tools.git | |
| DRM IGT GPU Tools | Andi Shyti |
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