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2019-01-29automake: drop assembler/shader-debugger automake supportDaniel Vetter
Seems to have seen no activity in past years, dropping the automake support hopefully doesn't upset anyone. Acked-by: Petri Latvala <petri.latvala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2018-11-05meson: Enable more warning flagsPetri Latvala
We had quite a bit of warning flags active on autotools builds that were not used for meson builds. Add the same flags autotools builds used to what meson was using (some flags autotools didn't have). For the assembler, disable some of the flags to make it build cleanly again. Signed-off-by: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2018-11-05assembler: Compare correct thingsPetri Latvala
This code is supposedly checking of the given register is nr=0 in ARF but was instead checking twice if the register is anything in ARF. Signed-off-by: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2018-04-04Test that register types are accepted in all valid forms.Adam Sampson
The assembler should accept ub, :ub, UB and :UB. Signed-off-by: Adam Sampson <ats@offog.org> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2018-04-04Use flex -i when building with meson.Adam Sampson
When built with automake, the assembler's tokeniser is built with -i, making it case-insensitive. This wasn't being done with meson. (The symptom was build failures in intel-vaapi-driver, which uses register types like ":ub". In lex.l, they're written as ":UB", so the lexer was rejecting them without -i.) Signed-off-by: Adam Sampson <ats@offog.org> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2018-01-17meson: Refactor get_option() calls for directoriesPetri Latvala
Fetch the configuration values in the toplevel meson.build for all subdirs to share. v2: Also remember tests/intel-ci/meson.build Signed-off-by: Petri Latvala <petri.latvala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2018-01-16meson: Add quotes in assembler/test/run-test.shPetri Latvala
If the directories contain spaces, run-test.sh fails. Signed-off-by: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2017-11-29igt: Remove Android supportArkadiusz Hiler
This patch gets rid of the Android support, deleting all the hacks and moving code around to the places it belongs. Android build is not really maintained properly and rots rather fast. With recent push for Meson here and Android going for Soong it will only accelerate. It's a good time to drop the illusion of providing any support. Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Kalyan Kondapally <kalyan.kondapally@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Acked-by: Petri Latvala <petri.latvala@intel.com>
2017-10-30assembler: Fix bashism in run-test.shRhys Kidd
[[ a != b ]] is a bashism. As it's just comparing $1 to an empty string, use -n with a normal [ ]. Noticed whilst testing meson builds. /bin/sh is apparently dash in Intel's CI. v2: - keep this as a /bin/sh script (Joonas Lahtinen) Fixes: c3863e19 ("assembler/test: Prep work for meson") CC: Daniel Vetter <daniel.vetter@ffwll.ch> CC: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
2017-10-02meson: Distribute meson build system filesPetri Latvala
Signed-off-by: Petri Latvala <petri.latvala@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-09-18meson: Install the (dis)assemblerVille Syrjälä
Install the assembler and disassemebler binaries, and the accompanying pkg-config file. Change libbrw into a static library since we don't want to install that. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2017-09-08meson: basic build system supportDaniel Vetter
Why? Because it's fast. Like really, really fast. Some data (from a snb laptop, so rather lower-powered): - Incremental build after $ touch lib/igt_core.c with meson: 0.6s It notices that the symbol list of the libigt.so hasn't changed and doesn't bother re-linking the almost 300 binaries we have. make -j 6 for the same scenario takes 44s. - Incremental build with nothing changed: make: 0.7s, meson: 0.2s This means stuff like --disable-git-hash is entirely pointless with meson, it's faster than a make ever can be (with 0.6s). - Reconfigure stage: ninja reconfigure 0.8s vs. ./configure 8.6s) - Running tests, after a full build: ninja test 6s vs. make check 24s - Full build (i.e. including ./autogen.sh respectively meson build), including tests, from a pristine git checkout. automake 2m49s vs. meson 44s. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Eric Anholt <eric@anholt.net> Cc: Daniel Stone <daniel@fooishbar.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Acked-by: Petri Latvala <petri.latvala@intel.com> Acked-by: Daniel Stone <daniels@collabora.com> Acked-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-09-08assembler/test: Prep work for mesonDaniel Vetter
Again we want to be able to run each testcase individually. Also, we need to make sure the target directory for the temp files exists - meson always builds with a build-dir outside of the source tree. Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Acked-by: Petri Latvala <petri.latvala@intel.com> Acked-by: Daniel Stone <daniels@collabora.com> Acked-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-03-10assembler/gen8_disasm.c: Remove unused m_mask_ctrlPetri Latvala
Signed-off-by: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2016-11-30assembler: RSQ is a math functionKristian H. Kristensen
Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-11-30assembler: Set 3src options before sourcesKristian H. Kristensen
Setting the 3src sources will assert align16, but that doesn't get set until we call set_instruction_options(). Call that before setting sources. Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-11-30assembler: Fix assert when setting 3src sourcesKristian H. Kristensen
We need to map the type to the 3src encoding before comparing to insn->bits1.da3src.src_reg_type, which is 3src encoded. Signed-off-by: Kristian H. Kristensen <hoegsberg@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-09-01autotools/: Allow check target to be invoked w/o the need to issue a build.Marius Vlad
We need to have the test list generated before running the check target. Migrated igt_command_line.sh to tests/ from lib/tests/, which allows to building the tests and execute the script. This would allow cleaning followed by a make check. Also assembler/ directory needs also to be adjusted in order for this to work. Kept the possibility to invoke tests/igt_command_line.sh to determine which test is failing. Signed-off-by: Marius Vlad <marius.c.vlad@intel.com> Url: https://patchwork.freedesktop.org/series/6539/ Reviewed-By: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-23assembler/: Fix lex warnings for %empty and %nonassoc.marius vlad
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com> Acked-by: Damien Lespiau <damien.lespiau@intel.com>
2015-08-21assembler: remove built sources with make cleanThomas Wood
Built sources are generated by "make all", so should be removed by "make clean". This also ensures "distcleancheck" passes. Signed-off-by: Thomas Wood <thomas.wood@intel.com>
2014-09-30assembler/skl: update the extdesc field for SEND instructionZhao Yakui
The send instruction on gen9 uses the 32bit immediate instead of 6bit immediate for the extended message descriptors. And some bits of SEND instruction are defined as the extdesc field. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-09-30assembler/skl: Add more cache agent for write(...)Zhao Yakui
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-09-30assembler/skl: update read(...)Zhao Yakui
READ(...) is used for Render Target read and Media Block read. But there is no sampler cache agent on gen9. At the same time two message types don't share the same cache agent any more. So a parameter is needed for cache agent. The 2th parameter of read(...) is not used for gen6/gen7/gen8. Hence it is reused as cache agent for SKL as that on ILK. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-09-30assembler/skl: Redefine the cache agent type for some fixed functionsZhao Yakui
The different cache agent type is defined for SKL although it still uses the same function ID as the previous generations. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-09-30assembler/skl: Add gen 9 to the -g optionDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19assembler: distinguish the channel of .z from the condition of .zXiang, Haihao
The scratch patch only works for generic register Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631 Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19assembler: switch the order of swizzle and regtype to match the BNF of the ↵Xiang, Haihao
assembly Fortunately our existing source didn't use swizzle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75631 Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-02-13Assembler/bdw: Remove the unsupported cache agent for WRITE(...)Zhao Yakui
The Sampler/Constant cache is read-only. And it can't be used as the target cache agent of WRITE message. Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-02-11assembler: fix condition for printing a warningThomas Wood
Signed-off-by: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-02-06assembler: define YY_NO_INPUT to prevent unused symbol warningsThomas Wood
Signed-off-by: Thomas Wood <thomas.wood@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-12-06assembler/bdw: Update write(...)Xiang, Haihao
write(...) is used for Render Target Write and Media Block Write. The two message types no longer share the same cache agent on GEN8, So a parameter is needed for cache agent. The 4th parameter of write() is used for write commit bit which has been removed since GEN7. Hence we can re-use the 4th parameter as cache agent on GEN8 Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-11-06assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+Zhao Yakui
This is required to send some messages to data port in GPU shader. For example: media_block_write message. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Add the support of align1 register-indirect addressing mode ↵Zhao Yakui
on Gen8 Otherwise it can't compile the following GPU shader that uses the register-indirect addressing mode. >add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw >add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: SEND instructionXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Small cleanupBen Widawsky
This was originally part of: commit 62298329350b965e4bbfc558e5a4b1b3646742ea Author: Xiang, Haihao <haihao.xiang@intel.com> Date: Wed Aug 14 14:21:16 2013 -0700 assembler: error for the wrong syntax of SEND instruction on GEN6+ I merged that patch separately, but this tiny hunk was leftover. In order to not muck in changing too much history, I am leaving this as a discrete patch, but with the changed commit message Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Check & Refinement Engine messageXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Video Motion Estimation(VME) messageXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Thread Spawn messageXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Data port messageXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Set thread switch for multiple branch instructionsXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Set jip/uip offsets used by flow control instructionsXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Disable mask control for advanced modeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Set math functionXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Use gen8_set_exec_size() to set the execution sizeDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Preliminary gen8 send & msgtarget supportDamien Lespiau
Still some work needed there, but enough for rendercopy. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Add the start of a gen8 disassemblerDamien Lespiau
Directly taken from Mesa. v2 (Ben): Updated copyright Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Make the validation functions take a brw_program_instructionDamien Lespiau
This allows to use the same functions to validate operands on gen8 for now. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Support some basic gen8 intructionsDamien Lespiau
We should now support alu2 intructions with direct register addressing. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-06assembler/bdw: Add gen8_instruction from mesaDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-04Update .gitignore a bitDaniel Vetter
- Ignore build-aux/ - Cleanup ignores for assembler/
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