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For DG2 and beyond regions alignment may vary so many tests would need
to be rewritten to handle this constraint. As Ashutosh noticed most of
tests can use safe alignment as a default.
Adopt intel-allocator to use safe or user defined power-of-two alignment.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Suggested-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Unify the argument names to avoid confusion.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Add few helper functions which can be used in reloc/no-reloc tests.
Common name is get_<ALLOCATOR_TYPE>_ahnd(i915, ctx), like:
get_reloc_ahnd(), get_simple_ahnd(). As simple allows acquiring
offsets starting from top or bottom of vm additional two were added:
get_simple_l2h_ahnd() and get_simple_h2l_ahnd(). put_ahnd() closes
allocator handle (if it is valid).
To acquire / release an offset get_offset() and put_offset() were
added. When allocator handle is invalid (equal to zero) get_offset()
just returns 0, put_offset() does nothing in this case. We can then
call them regardless reloc/no-reloc code keeping conditional code in
these functions.
Be aware that each get_..._ahnd() functions calls checking kernel
relocation capabilities. This generates extra execbuf ioctl() call (but
without queueing job to gpu). If that is a problem and we want to avoid
additional execbuf calls, checking relocation caps should be done on the
beginning of the test. Allocator handle (open()) should be acquired then
conditionally according to the result of this check.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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To use spinners with no-reloc we need to alloc offsets for them
from already opened allocator. As we don't know what strategy
is chosen for open (likely HIGH_TO_LOW for SIMPLE allocator) we
want to overwrite it for spinners (there's expectation they
will reside on low addresses).
Extend allocator API adding intel_allocator_alloc_with_strategy()
to support spinners rewriting.
v2: add change in api_intel_allocator test to compile properly
whole series.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Validating allocator code (leaks and memory overwriting) can be done
with address sanitizer. When allocator is not working in multiprocess
mode it is easy, problems start when fork is in the game. In this
situation we need to separate preparation and starting allocator thread.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reported-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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For discrete gens we have to cease of using relocations when batch
buffers are submitted to GPU. On cards which have ppgtt we can use
softpin establishing addresses on our own.
We added simple allocator (taken from Mesa; works on lists) and
random allocator to exercise batches with different addresses. All
of that works for single VM (context) so we have to add additional
layer (intel_allocator) to support multiprocessing / multithreading.
For main IGT process (also for threads created in it) intel_allocator
resolves addresses "locally", just by mutexing access to global
allocator data (ctx/vm map). When fork() is in use children cannot
establish addresses on they own and have to contact to the thread
spawned within main IGT process. Currently SysV IPC message queue was
chosen as a communication channel between children and allocator thread.
Child calls same functions as main IGT process, only communication path
will be chosen instead of acquiring addresses locally.
v2:
Add intel_allocator_open_full() to allow user pass vm range.
Add strategy: NONE, LOW_TO_HIGH, HIGH_TO_LOW passed to allocator backend.
v3:
Child is now able to use allocator directly as standalone. It only need
to call intel_allocator_init() to reinitialize appropriate structures.
v4:
Add pseudo allocator - INTEL_ALLOCATOR_RELOC which just increments
offsets to avoid unnecessary conditional code.
v5:
Alter allocator core according to igt_map changes.
v6:
Add internal version __intel_allocator_alloc() to return
ALLOC_INVALID_ADDRESS without assertion.
v7:
Add libatomic for linking libigt library. It is required on some
archs, like mips.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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