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2022-05-25lib/intel_batchbuffer: Use detected start offset in intel-bb instead 0x0Zbigniew Kempczyński
On some platforms (like on ATS) 0x0 may not be available so allocator should be instantiated with safe start offset to avoid getting -ENOSPC. Change require also relaxation of automatic range selection in the allocator. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2022-05-25lib/DG2: create flat ccs framebuffers with 4-tileJuha-Pekka Heikkilä
Add support for DG2 flat ccs framebuffers with tile-4. Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Signed-off-by: Jeevan B <jeevan.b@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2022-05-17lib/intel_batchbuffer: Fix typo from src_tiling to dst_tilingJeevan B
fix typo to avoid CRC mismatch for tile-4 tests Signed-off-by: Jeevan B <jeevan.b@intel.com> Fixes: ff9b8f21ce93 ("igt/lib: Add tile 4(F-tile) format support") Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2022-04-01lib/intel_batchbuffer: add create without relocsKamil Konieczny
There is create function with relocations, so add its counterpart without it. v3: moved down after intel_bb_create_with_relocs_and_context, added function description (Zbigniew review) v2: change to HIGH_TO_LOW allocation (Zbigniew) Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2022-03-09igt/lib: Add tile 4(F-tile) format supportJeevan B
Introduce support for the new Tile4 format, which is 4K column-major tiles consisting of 64B row-major subtiles, with same base structure as Y Tile(16B OWords * 4) v2: place I915_TILING_4 correctly. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Jeevan B <jeevan.b@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2022-03-07lib/rendercopy/dg2: Add rendercopy support for dg2Pankaj Bharadiya
The present gen12 rendercopy is not compatible with gen21p71(dg2). Add rendercopy support for dg2 and introduce gen12p71_render_copyfunc function to use it. Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com> Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2022-03-07lib/intel_batchbuffer: Use safe alignment for intel-bbZbigniew Kempczyński
Discrete cards can have different memory alignment requirements when objects used in execbuffer comes from different memory regions. Lets use safe alignment which should be fine regardless objects location. v2: ensure passed alignment is power of two (Kamil) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
2022-02-25lib/intel_allocator: Add safe alignment as a defaultZbigniew Kempczyński
For DG2 and beyond regions alignment may vary so many tests would need to be rewritten to handle this constraint. As Ashutosh noticed most of tests can use safe alignment as a default. Adopt intel-allocator to use safe or user defined power-of-two alignment. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Suggested-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2022-02-02lib/intel_batchbuffer: add tracking and reset for allocatorKamil Konieczny
After subtest ends, due to normal flow or after fail by igt_assert, igt_core inits intel_allocator before next subtest, and this makes allocator handle keeped in intel_batchbuffer invalid. Moreover any call to intel_allocator can result in fail as there are no allocators until first allocator_open. Add tracking intel_butchbuffer if it is using allocator and recreate its allocator handle and offsets from igt_core before next subtest. Add flag for turn on tracking and a helper function for it with default value off. It will not change behaviour of already used tests. Use case is for standalone runs with many subtests like gem_concurrent_blit. v2: add tracking flag with default off (Zbigniew) v3: add and correct functions descriptions (Zbigniew) Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2022-01-04tests/i915/gem_media_vme : skip on no media SamplersMastan Katragadda
Media samplers are not present on some of Gen11 platforms adding skip on EHL and JSL as per Bspec. Bspec:29151 Changes since V1 : Moved this skip check to igt_get_media_vme_func.[Tony Ye] CC: Tony Ye <tony.ye@intel.com> Signed-off-by: Mastan Katragadda <mastanx.katragadda@intel.com> Reviewed-by: Tony Ye <tony.ye@intel.com>
2021-10-15lib/intel_batchbuffer: Detect and use kernel alignment capabilityZbigniew Kempczyński
For gens where relocations are supported kernel can set object offset everywhere it wants but it honours the alignment setting. For gens where we got no relocations and setting alignment is not allowed in exec object we want to ensure allocator will still use it to properly align the offset. Detect kernel caps in alignment setting and use it for reloc/no-reloc paths accordingly. v2: rename to gem_allows_obj_alignment() (Ashutosh) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-10-06tests/i915/gem_pxp: Verify execbuf fails with stale PXP context after teardownAlan Previn
Add a subtest to verify that reusing a stale protected context in a gem_execbuff after a teardown fails with -EIO error because it's banned. Trigger the teardown via the pxp invalidation debugfs that simulates a HW teardown IRQ. NOTE: The end-to-end architecture requirement includes that any break in the links of the PXP sessions needs to trigger a full teardown and the application needs to be made aware of that allowing it to re-establish the end-to-end pipeline of buffers, contexts and renders again if it chooses to. This stricter behavior targets only contexts created with PXP enabled. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-10-06lib: Add PXP attribute support in batchbuffer and buffer_ops libsAlan Previn
Eventually when we get to testing PXP rendering capability, we shall reuse lib's rendercopy feature. Rendercopy libraries shall retrieve information about PXP-session-enablement and which buffers are protected from these new flags. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-10-05lib/intel_bufops: Store gem bo sizeZbigniew Kempczyński
intel_buf is keeping its size which may differ to underlying gem bo size. Introduce keeping bo_size field which is used along with softpin mode - like in intel_bb. Patch also should remove previous discrepancy where intel_buf_bo_size() returned requested (not gem bo size). From now on user has an access to: 1. raw buffer size - intel_buf_size() - function returns how buffer data really takes in the memory 2. gem bo buffer size - intel_buf_bo_size() - function returns how big underlying gem object is Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-10-05lib/intel_bufops: Rename intel_buf_bo_size() -> intel_buf_size()Zbigniew Kempczyński
To avoid confusion with intel_buf_bo_size() which for some buffers can return size not equal to underlying gem bo size rename it to intel_buf_size(). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-09-28lib/intel_batchbuffer: Remove duplicated assignmentZbigniew Kempczyński
Due to some changes related in the alignment in the future remove unnecessary assignment. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-08-10lib/intel_batchbuffer: Try to avoid relocations in blittingZbigniew Kempczyński
We're proposing not overlapping offsets in both blitter copying functions so we can try to skip relocations. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-08-10lib/intel_batchbuffer: Add allocator support in blitter src copyZbigniew Kempczyński
Adjust igt_fb library + prime_vgem test as they are blitter src copy users. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-08-10lib/intel_batchbuffer: Add allocator support in blitter fast copyBhanuprakash Modem
For newer gens kernel will reject relocations by returning -EINVAL so we should support allocator and acquire offsets for blit. Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2021-08-10lib/intel_batchbuffer: Ensure relocation code will be calledZbigniew Kempczyński
Currently we're not sure relocations code will be called (presumed_offset == offset == 0) so enforce them. Passing presumed_offset and offset to auxiliary functions will prepare code to switch to no-reloc mode. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-07-08lib/intel_bb: Remove intel_bb_assign_vm and tests (v2)Jason Ekstrand
It's not used by anything other than the tests for that functionality and it relies on setting the VM via SET_CONTEXT_PARAM which is deprecated. Delete it for now. We can add it back in later if it's actually useful and do it properly then. v2 (Zbigniew Kempczyński): - Also remove intel_bb_detach_intel_buf() Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-05-27lib/i915/gem_create: Add gem_create_extAndrzej Turko
Add a wrapper for gem_create_ext ioctl (a version of gem_create that accepts extensions). In preparation for the driver change implementing it, a local definition of its id and necessary structs have been added, which are to be erased as soon as those definitions appear in the i915_drm.h file. The new ioctl wrapper is added to a separate file. For consistency the wrapper of the old ioctl, gem_create is moved from ioctl_wrappers to gem_create. Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com> Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Chris P Wilson <chris.p.wilson@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Don't collect relocations for newer gensZbigniew Kempczyński
Preparing universal batches for rendercopy, gpgpu fill and media fill must take into account does kernel support relocations for specified gen or not. In intel-bb we assume relocations are supported so user is calling intel_bb_emit_reloc() like functions to emit address in the batch what collects relocation required for execbuf call in intel-bb. For newer gens kernel will reject such relocations returning -EINVAL so we should just provide an offset (returned from allocator) and skip adding relocation entry to intel-bb. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Add tracking intel_buf to intel_bbZbigniew Kempczyński
From now on intel_bb starts tracking added/removed intel_bufs. We're safe now regardless order of intel_buf close/destroy or intel_bb destroy paths. When intel_buf is closed/destroyed first and it was previously added to intel_bb it calls the code which removes itself from intel_bb. In destroy path we go over all tracked intel_bufs and clear tracking information and buffer offset (it is set to INTEL_BUF_INVALID_ADDRESS). Reset path is handled as follows: - intel_bb_reset(ibb, false) - just clean objects array leaving cache / allocator state intact. - intel_bb_reset(ibb, true) - purge cache as well as detach intel_bufs from intel_bb (release offsets from allocator). Remove intel_bb_object_offset_to_buf() function as tracking intel_buf updates (checks for allocator) their offsets after execbuf. Alter api_intel_bb according to intel-bb changes. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Create bb with strategy / vm rangesZbigniew Kempczyński
Previously intel-bb just used default allocator settings (safe, chosen for work from the box). But limitation is not good if we want to exercise non-standard cases (vm ranges for example). As allocator provides passing full settings lets intel-bb also allows to use them. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Use relocations in intel-bb up to gen12Zbigniew Kempczyński
We want to use relocations as long as we can so change intel-bb strategy to use it as default up to gen12. For gen12 we have to use softpinning in ccs aux tables so there we enforce using allocator instead of relocations. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Integrate intel_bb with allocatorZbigniew Kempczyński
Refactor the intel-bb interface to introduce the IGT allocator for specifying the position of objects within the ppGTT. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-01-11lib/i915: Split gem_create.c from ioctl_wrappers.cAndrzej Turko
In preparation for a variation on the exisiting GEM_CREATE API, split the ioctl from out of the large ioctl_wrappers.c Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-11-23lib: Assert potential malloc failures in intel_batchbufferChris Wilson
Hunting: Received signal SIGSEGV. Stack trace: #0 [fatal_sig_handler+0xd6] #1 [killpg+0x40] #2 [intel_bb_add_object+0x105] #3 [__real_main666+0xe83] #4 [main+0x27] #5 [__libc_start_main+0xe7] #6 [_start+0x2a] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2020-11-23lib/rendercopy: Enable fast clearMika Kahola
Enable fast clear rendering on rendercopy function. v2: Modify _gen9_render_copyfunc to support fast clear (Matt) Enable fast clear bit on 3D sequence (Matt) Add helper function to figure out clear color modifier (Matt) v3: Remove unrelated line additions/removes v4: Fast clear with color (Imre) v5: Write raw 32-bit color values to register (Imre) Require 32-bit color format v6: Rebase to use batchbuffer without libdrm dependency v7: Enable clear color (Nanley) v8: Various cleanups (Imre) Modificate buffer creation (Imre) v9: Renaming of render_copyfunc() to render_op() (Imre) Remove igt_render_clearfunc variable (Imre) v10: Dst buffer width division by 64 pixels and height by 16 lines (Imre) Reorder ss10 bit fields (Imre) Relocate buffer with clear color value enabled (Imre) Set fast clear enable bit in correct dword (Imre) Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com>
2020-11-19lib/intel_batchbuffer: add intel_bb_blit_copy wrapperDominik Grzegorzek
This patch adds intel_bb_copy_intel_buf to make copying a whole intel_buf easier and more readable. Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-11-11lib/intel_batchbuffer: Fix relocs across the 4GB address boundaryImre Deak
If the delta of a relocation target wrt. the object base address crosses the 4GB address boundary the upper 32bit of the target address will be incorrect, fix this. Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-10-15lib: Use unsigned gen for forward compatible testsChris Wilson
Unknown, so future, gen are marked as -1 which we want to treat as -1u so that always pass >= gen checks. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2298 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2020-10-01lib/intel_batchbuffer: Prepare batch to use in allocator infrastructureZbigniew Kempczyński
With upcoming of allocator code we need to ensure batch will execute with appropriate context. If mismatch between allocator data and batch could lead to strange or wrong results. All functions which could change context in execbuf called from intel_bb were removed. As an allocator requires size (which was not previously required in intel_bb) adding object to intel_bb is now mandatory. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: address review comments (base64 dump)Zbigniew Kempczyński
Simplify base64 dump + add linelen. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: fix intel_bb cacheZbigniew Kempczyński
When objects array is reallocated index tree contains invalid pointers and we got segmentation fault. Fix changes of the strategy of keeping objects - now we have two indexes - cache (all objects added previously to the bb) and current (contains objects added after soft bb reset). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: use canonical addresses for 48bit ppgttZbigniew Kempczyński
For all EXEC_OBJECT_PINNED objects we need to be sure address passed must be in canonical form. Until IGT allocator will be written just limit 48 and 47 bit gtt tables to 46 bit only. We don't want to play with canonical addresses with 47-bit set to 1 (and then 63:48). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: dump bb to base64Zbigniew Kempczyński
Code for dumping bb to log as base64 which can be used when something wrong happened. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: add new functions to support rendercopyZbigniew Kempczyński
To cover rendercopy in dependent tests we need to add the following: 1. relocation in any handle Previously batchbuffer was the main target of relocations. As AUX table require relocations too add support for that in intel_bb 2. set/get default alignment Add default alignment for objects added to intel_bb (AUX tables use different alignment for different objects) 3. add intel_buf to intel_bb Save proposed address to intel_buf, clear flags on reset 4. add set/clear flag functions 5. unification of intel_bb_flush.*() functions 6. fixing indentation 7. change alignment constraints on gen3 Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-07-15tests/i915/gem_huc_copy: Enable a HuC copy testSally Qi
This test case loads the HuC copy firmware to copy the content of the source buffer to the destination buffer. v2: (Tony Ye) * Restructured some functions and files. * Defined the copy buffer size as 4K explicitly as the HuC Copy kernel always copy 4K bytes from src buffer to dst buffer. v3: (Feng Qi, Antonio Argenziano, Tony Ye) * Restructured some functions as igt requested, exclude libdrm function call. * Remove huc function wrappers * Random initialize source input buffer v4: (Robert Fosha) * Fix autotools build failure. v5: (Feng Qi, Tony Ye) * Released all bo buffer after huc copying. * Restructured huc_copy() function. v6: (Feng Qi) * Fixed the function of huc enabling and status check * Added huc_copy to fast feedback testlist v7: (Tony Ye, Feng Qi, Robert Fosha, Chris Wilson, Michal Wajdeczko) * Check error with HUC_STATUS ioctl instead of debugfs v8: (Antonio Argenziano) * Remove unnecessary variable. * Add huc_load subtest. * Move failure checks out of igt_fixture. * get_huc_status() returns errno and then status as a parameter v9: (Antonio Argenziano) * Remove huc_load subtest - to be added later. v10: * Rebase * Remove huc_load subtest from fast-feedback.testlist. Signed-off-by: Feng Qi <feng.qi@intel.com> Signed-off-by: Tony Ye <tony.ye@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
2020-07-06lib/bufops: add surface array to cover ccs pgtableZbigniew Kempczyński
Rendercopy for gen12+ requires additional aux pgtable. Alter bufops and tests to use surface[] and ccs[] instead aux. This step is required to properly rewrite handling aux pgtable to use with intel_bb. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-07-03lib/intel_batchbuffer: Extend intel_bbZbigniew Kempczyński
As we're going toward removing libdrm from rendercopy tests some additional code in intel_bb is required. So add new functions and fix memory issues in the reset path. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-06-06lib/intel_batchbuffer: add bb resetZbigniew Kempczyński
For some scenarios we want to keep previous objects and their offsets and recreate only batchbuffer object. To allow user do that add bb reset function which can or not purge collected objects from previous run. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-06-01tests/gem_(gpgpu|media)_fill: remove the _v2 suffixZbigniew Kempczyński
Remove libdrm functions and replace them with new ones after removing _v2 suffix introduced for transition state. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-21lib/intel_batchbuffer: Add new media fillfunc v2Zbigniew Kempczyński
Media fill function selection for "_v2" version. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-20lib/intel_batchbuffer: Introduce temporary igt_fillfunc_v2_tZbigniew Kempczyński
gem_gpgpu_fill test is spread over different generations (gen >= 7) so some transitional state is required until all gens will be rewritten to new intel_bb code without libdrm dependency. So, let's define new igt_fillfunc_v2_t to be new fill function. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-20lib/intel_batchbuffer: Introduce intel_bbZbigniew Kempczyński
Simple batchbuffer facility which gathers and outputs relocations. v2: make bb api more consistent and universal v3: fix compiling issues on non-x86 arch v4: add indexing tree and marking object as render target v5: randomizing addresses to avoid relocations v6: fix invalid reallocation size (Chris) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-02-18lib: Don't specify a non-existent blitter ringChris Wilson
I915_EXEC_BLT only exists on gen6+ Closes: https://gitlab.freedesktop.org/drm/intel/issues/1256 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
2020-02-03lib/igt_fb: Add 64bpp support to the XY_SRC blit commandImre Deak
While the XY_SRC blit command lacks native 64bpp copy support, we can emulate it using a 32bpp copy by treating the 64bpp plane as a 2x wide 32bpp plane. Add support for this, as we need the XY_SRC command at least for GEN12+ X-tiled formats. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2020-02-03lib/intel_batchbuffer: Add blitter copy using XY_SRC_COPY_BLTVanshidhar Konda
Add a method that uses the XY_SRC_COPY_BLT instruction for copying buffers using the blitter engine. v2: Use uint32_t for parameters; fix stride for Gen2/3 v3: - Fix 64b relocations. (Chris) - Rename func to igt_blitter_src_copy(), being the only version of the same functionality. (Chris) - Use the existing instruction definition of MI_FLUSH_DW. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Vanshidhar Konda <vanshidhar.r.konda@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-13 17:20:09 +0000