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2022-06-15lib/i915: Fix ATS-M definitionsKarolina Drobnik
Instead of using a separate "is_ats_m" flag, reuse "is_dg2" in ATS-M intel_device_info definition. Delete is_ats_m in intel_device_info struct definition and IS_ATS_M() macro, as they are no longer needed. Signed-off-by: Karolina Drobnik <karolina.drobnik@intel.com> Acked-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
2022-06-07lib/intel_chipset: restore usage of has_flatccs flagJuha-Pekka Heikkila
When older patches had been merged on top of newer patches has_flatccs flag usage had gotten lost, put it back here. While at it also set has_flatccs flag to take only one bit since it is of boolean type. CC: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2022-06-01lib/i915: Add ATS-M definitionsKarolina Drobnik
Add local definitions for ATS-M to enable it for testing. Signed-off-by: Karolina Drobnik <karolina.drobnik@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2022-05-25lib/DG2: create flat ccs framebuffers with 4-tileJuha-Pekka Heikkilä
Add support for DG2 flat ccs framebuffers with tile-4. Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Signed-off-by: Jeevan B <jeevan.b@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
2022-03-09lib/intel_device_info: Add a flag to indicate tiling 4 supportMika Kahola
Add tiling 4 support flag for DG2 platform. This is similar that we have defined in kernel i915_pci.c intel_device_info() for DG2. v2: rebase Signed-off-by: Jeevan B <jeevan.b@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2022-02-15lib/intel_chipset: Add flatccs flag for DG2Zbigniew Kempczyński
FlatCCS is discrete DG2+ feature and is worth to add the flag which enables it. Add HAS_FLATCCS() macro which should make conditional code simpler and compact. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2022-02-15lib/intel_device_info: Introduce i915_pciids_local.h and add DG2 definitionZbigniew Kempczyński
Before pciids will land in the kernel and then is merged to IGT we need to add them locally to unblock compilation and testing staged kernels. We can use some hybrid solution where intel_device_info takes official pciids from i915_pciids.h and not official from i915_pciids_local.h. Such strategy allows us to decrease code changes in the libraries/tests especially where IS_GENx() or IS_<machine>() macros are in use. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2021-12-21lib/adl_n: Add Alder Lake N platform definitionTejas Upadhyay
Adding Alder lake N platform definitions Reviewed-by: Petri Latvala <petri.latvala@intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-12-17lib/rpl_s: Add Raptor Lake S platform definitionTejas Upadhyay
Adding Raptor lake platform definitions Reviewed-by: Petri Latvala <petri.latvala@intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
2021-06-07lib/i915/adl-p: Basic ADL-P enablingClint Taylor
Cc: Caz Yokoyama <caz.yokoyama@intel.com> Cc: Mika Kahola <mika.kahola@intel.com> Cc: Swati Sharma <swati2.sharma@intel.com> Cc: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-07lib/i915: Add intel_display_ver() and use it in display tests/libsMatt Roper
Display code should check the display version of the platform rather than the graphics version; on some platforms these versions won't be the same. v2: - Continue to use intel_gen() in draw_rect_blt() since it's checking the version of the blitter engine (graphics) rather than the display version. (Jose) - Rename some gen -> display_ver in kms_universal_plane too. (Jose) Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-06-07lib/i915: Split 'gen' into graphics version and display versionMatt Roper
Going forward, platforms may have separate architecture versions for graphics and display and should no longer utilize a single 'gen' version. While doing this, let's change the versions to raw version values rather than BIT(v) as we were doing in the past. It looks like some of the existing uses of devinfo->gen were already misinterpreting this field and failing to pass the value through ffs(), so this change may also fix some bugs. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2021-02-12lib/adl_s: Add Alder Lake S platform definitionTejas Upadhyay
Adding Alder lake platform definitions Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2020-11-13lib/i915: Identify JasperlakeTejas Upadhyay
Recently we did split of EHL/JSL thus we need to indentify Jasperlake. Changes since V1: - Added jasperlake codename Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-08-13lib/i915: Add DG1 platform definitionAdam Miszczak
Signed-off-by: Adam Miszczak <adam.miszczak@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2020-07-26tools: Use the gt number stored in the device infoChris Wilson
Don't use the encoded information within the PCI-ID for the GT value, as the rules keep changing. Use the device info instead. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-07-26lib/i915: Identify RocketlakeChris Wilson
commit a048d54f58dd ("lib: Sync i915 PCI ids") added the ids for Rocketlake, but no identification tables. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2217 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-02-19lib/intel_chipset: identify Elkhart LakeLionel Landwerlin
We'll need to identify this platform for performance tools. v2: add codename (Chris) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Petri Latvala <petri.latvala@intel.com>
2019-07-23i915/gem_mocs_settings: Identify CometlakeChris Wilson
Cometlake is yet another Skylake refresh and used the same MOCS registers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111137 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
2019-07-22lib/tgl: Add Tigerlake platform definitionJavier Villavicencio
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Javier Villavicencio <javier.villavicencio@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
2019-07-04lib/intel_chipset: Move BIT macro to common placeLukasz Kalamarz
This macro is defined in two tests. We can move it to common place in ioctl_wrappers, which is included by all tests. v2: Missed intel_device_info lib. Moved BIT definition to intel_chipset, which is part of igt.h Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
2019-04-26lib: Add Cometlake platform definitionPetri Latvala
Commit a794f28f01f2 ("lib: sync with the newer i915_pciids.h from the Kernel") added CML PCI IDs but did not update intel_device_info.c Signed-off-by: Petri Latvala <petri.latvala@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110514 Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
2019-03-29Revert "lib/igt_device: Move intel_get_pci_device under igt_device"Ville Syrjälä
One significant usecase for intel_reg/etc. is to be able to examine the hardware state *before* loading the driver. If the tool forces the driver to load we've totally lost that capability. This reverts commit 8ae86621d6fff60b6e20c6b0f9b336785c935b0f. Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Michał Winiarski <michal.winiarski@intel.com>
2019-03-20lib/igt_device: Move intel_get_pci_device under igt_deviceMichał Winiarski
It allows us to make things a little bit more generic. Also, we now require fd rather than doing guesswork when it comes to pci address. v2: Use readlinkat rather than string concat, move stuff around, provide a version that does not assert. (Chris) v3: Print addr on failure, avoid assignment in conditionals. (Chris) Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2018-05-01lib: Add Icelake platform definitionArkadiusz Hiler
v2 (made by Paulo): PCI IDs are now part of a previous patch, so we can move the INTEL_ICL_11_IDs macro to this patch and avoid the compilation warining on unused intel_icelake_info. v3 (made by Paulo): fix the changelog (Antonio). Acked-by: Antonio Argenziano <antonio.argenziano@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2018-03-12intel_chipsets: store GT information in device infoLionel Landwerlin
Right now we define this only for big core skus and leave the gt field to 0 to mean unknown. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-06-30lib/cnl: Introduce Cannonlake platform defition.Rodrigo Vivi
Cannonlake is a Intel® Processor containing Intel® HD Graphics following Kabylake. It is Gen10. Let's start by adding the platform definition based on previous platforms. On following patches we will start adding PCI IDs and the platform specific changes. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-29lib/cfl: Introduce Coffeelake platform definition.Rodrigo Vivi
Coffeelake is a Intel® Processor containing Intel® HD Graphics following Kabylake. It is Gen9 graphics based platform on top of CNP PCH. On following patches we will start adding PCI IDs and the platform specific changes. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
2017-01-03lib/intel_chipset: Add geminilake platform definitionAnder Conselvan de Oliveira
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2016-09-01lib/intel_chipset: Fix compilation when enabling the debugger.marius vlad
Add IS_SANDYBRIDGE() macro used by debugger/eudb. Signed-off-by: Marius Vlad <marius.c.vlad@intel.com> CC: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-07-27lib: Update igt_chipset docsDaniel Vetter
gtkdoc can't handle aliasing, so let's rename the intel_device_info function. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-07-25intel_chipset: Fixup HAS_PCH_SPLIT() to exclude AtomsChris Wilson
The Atoms do not have the PCH split, exclude them from HAS_PCH_SPLIT(). At the time, I was planning to add the feature flag and make intel_pch_type() useful, but for now take the simple option of expanding th predicate. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Remove unused PCI_CHIP idsChris Wilson
These are now taken from i915_pciids.h. However, some of the older ids are still used explicitly for per-devid information, and so are not yet removable. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Replace lookup of GT size with computationChris Wilson
Instead of a large if-chain for matching devid to GT, we can just compute it directly from the encoded devid. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_G4X to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_915, IS_945 to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_PINEVIEW to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_IRONLAKE to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_IVYBRIDGE to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_VALLEYVIEW to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_HASWELL to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_BROADWELL to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_CHERRYVIEW to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_SKYLAKE to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_BROXTON to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_BROADWATER, IS_CRESTLINE to device infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_965 to use intel_gen()Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30intel_chipset: Convert IS_MOBILE to intel_device_infoChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-30lib: Start weaning off defunct intel_chipset.hChris Wilson
Several years ago we made the plan of only having one canonical source for i915_pciids.h, the kernel and everyone importing their definitions from that. For consistency, we style the intel_device_info after the kernel, most notably using a generation mask and a per-codename bitfield. This first step converts looking up the generation for a devid tree from a massive if(devid)-chain to a (cached) table lookup. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-28lib/intel_chipset: Removing PCI IDs that are no longer listed as Kabylake.Rodrigo Vivi
This is unusual. Usually IDs listed on early stages of platform definition are kept there as reserved for later use. However these IDs here are not listed anymore in any of steppings and devices IDs tables for Kabylake on configurations overview section of BSpec. So it is better removing them before they become used in any other future platform. It reflects kernel: commit a922eb8d4581c883c37ce6e12dca9ff2cb1ea723 Author: Rodrigo Vivi <rodrigo.vivi@intel.com> Date: Thu Jun 23 14:50:36 2016 -0700 drm/i915: Removing PCI IDs that are no longer listed as Kabylake. v2: Rebase. Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-13 08:20:42 +0000