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The present gen12 rendercopy is not compatible with gen21p71(dg2).
Add rendercopy support for dg2 and introduce gen12p71_render_copyfunc
function to use it.
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Enable fast clear rendering on rendercopy function.
v2: Modify _gen9_render_copyfunc to support fast clear (Matt)
Enable fast clear bit on 3D sequence (Matt)
Add helper function to figure out clear color modifier (Matt)
v3: Remove unrelated line additions/removes
v4: Fast clear with color (Imre)
v5: Write raw 32-bit color values to register (Imre)
Require 32-bit color format
v6: Rebase to use batchbuffer without libdrm dependency
v7: Enable clear color (Nanley)
v8: Various cleanups (Imre)
Modificate buffer creation (Imre)
v9: Renaming of render_copyfunc() to render_op() (Imre)
Remove igt_render_clearfunc variable (Imre)
v10: Dst buffer width division by 64 pixels and height by 16 lines (Imre)
Reorder ss10 bit fields (Imre)
Relocate buffer with clear color value enabled (Imre)
Set fast clear enable bit in correct dword (Imre)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
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With upcoming of allocator code we need to ensure batch will execute
with appropriate context. If mismatch between allocator data and batch
could lead to strange or wrong results. All functions which could change
context in execbuf called from intel_bb were removed.
As an allocator requires size (which was not previously required in
intel_bb) adding object to intel_bb is now mandatory.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Use intel_bb as main batch implementation to remove libdrm dependency.
Rewrite all pipelines to use intel_bb and update render|vebox_copy
function prototypes.
Note that this will introduce compile failures into the indiviual users
until they are transitioned over to the new interface in the following
patches. The process is completed with "lib/rendercopy_bufmgr: remove
rendercopy_bufmgr."
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Previous generations didn't use SWSB dependency tracking.
For that reason shader was adopted to handle that on TGL.
FIXME: Some tests still have to be fixed, currently working:
gem_render_copy @linear @x-tiled @y-tiled @yf-tiled
gem_render_copy_redux
gem_render_linear_blits @basic
gem_render_tiled_blits @basic
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
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This patch introduces a render copy shader for GEN11.
The plumbing is same as with GEN9, so we can reuse it, extracting the
common parts, and wrapping it in GEN-specific helpers.
v2: Added gen11 shader source path next to its binary form
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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The gen4 code was pushed without being fixed up for the constification
of igt_render_copyfunc_t
../lib/intel_batchbuffer.c: In function ‘igt_get_render_copyfunc’:
../lib/intel_batchbuffer.c:837:8: warning: assignment to ‘igt_render_copyfunc_t’ {aka ‘void (*)(struct intel_batchbuffer *, struct _drm_intel_context *, const struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, const struct igt_buf *, unsigned int, unsigned int)’} from incompatible pointer type ‘void (*)(struct intel_batchbuffer *, drm_intel_context *, struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, struct igt_buf *, unsigned int, unsigned int)’ {aka ‘void (*)(struct intel_batchbuffer *, struct _drm_intel_context *, struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, struct igt_buf *, unsigned int, unsigned int)’} [-Wincompatible-pointer-types]
copy = gen4_render_copyfunc;
Fixes: 61370b2d43db ("lib/rendercopy: Add gen4/5 rendercopy")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Add rendercopy implementation for gen4/5. Basic structure
copied from the gen6 implementation, and the gen4/5 specific
bits were mostly lifted from sna.
v2: Renamed registers definitions, which are GEN4 specific
to include that prefix (Lukasz)
v3: Rebase and checkpatch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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No one generally needs to modify the igt_bufs we pass around,
so make them const.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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v2 (Ben): Rebased on:
commit ea11d103e0617e33bce6f11328521d15b13422b0
Author: Oscar Mateo <oscar.mateo@intel.com>
Date: Tue Nov 12 11:50:35 2013 +0000
build: list all test/tool/lib source files in their own Makefile.sources
v3: (Ben): Rebased on the doc/API rework. Probably needs review
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Step one to properly namespace the rendercpy/mediafill functions. Als
give the buf_height/width helpers a proper igt_ prefix.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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And move the public interfaces into intel_batchbuffer.[hc].
A bit messy since we are fairly inconsistent with our header #include
handling.
Also exclude rendercopy.h from the documentation.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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rendercopy does the batch buffer flush internally, so if we want
to use it with multiple contexts, we need to pass the context
in from caller.
v2: Modify rendercopy_gen8 as well
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Move scratch_buf_write_to_png() to its only user, gem_render_copy.c.
This makes the cairo dependencies easier to handle from the Android
perspective, but if there is a good reason why this file exists I can
try to handle it differently.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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For machine with split BCS/RCS rings, we also need to test whether we
correctly wait upon outstanding render work before flipping and changing
modes. This should also serve to exercise the ring selection code for
flips.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Otherwise we won't update all the tests if we add new render
copyfuncs.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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On SandyBridge, the BLT commands were split from the RENDER commands as
well as the BSD split inherited from Ironlake. So we need to make sure
we do exercise each ring, and in order to do so we also need to make
sure each batch takes longer to execute than it takes for us to
submit it.
v2: Exercise each ring sequentially.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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