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With upcoming of allocator code we need to ensure batch will execute
with appropriate context. If mismatch between allocator data and batch
could lead to strange or wrong results. All functions which could change
context in execbuf called from intel_bb were removed.
As an allocator requires size (which was not previously required in
intel_bb) adding object to intel_bb is now mandatory.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Use intel_bb as main batch implementation to remove libdrm dependency.
Rewrite all pipelines to use intel_bb and update render|vebox_copy
function prototypes.
Note that this will introduce compile failures into the indiviual users
until they are transitioned over to the new interface in the following
patches. The process is completed with "lib/rendercopy_bufmgr: remove
rendercopy_bufmgr."
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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UV FBs have two color surfaces so extend the igt_buf struct accordingly
to support blitting such FBs.
The patch is produced with the coccinelle patch below.
No functional changes.
@@
@@
struct igt_buf {
...
- uint32_t stride;
...
- uint32_t size;
+ struct {
+ uint32_t stride;
+ uint32_t size;
+ } surface[2];
...
};
@@
struct igt_buf b;
@@
<...
(
- b.stride
+ b.surface[0].stride
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- b.size
+ b.surface[0].size
)
...>
@@
struct igt_buf *b;
@@
<...
(
- b->size
+ b->surface[0].size
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- b->stride
+ b->surface[0].stride
)
...>
@@
identifier I;
expression E1;
expression E2;
@@
(
struct igt_buf I = {
- .size = E1,
- .stride = E2,
+ .surface[0] = {
+ .size = E1,
+ .stride = E2,
+ },
};
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struct igt_buf I = {
- .size = E1,
+ .surface[0] = {
+ .size = E1,
+ },
};
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struct igt_buf I = {
- .stride = E1,
+ .surface[0] = {
+ .stride = E1,
+ },
};
)
v2:
- Rebase on latest upstream. (Mika)
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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Allow copying between fp16 surfaces. We'll use the FLOAT
surface format since that's all the display supports currently.
Hopefully the hardware gives us a 1:1 copy, at least if
the input doesn't contain crazy infs/nans etc. We could
choose UNORM instead but that won't work for eventually
exposing fp16+ccs. Although we do need to replace the
simple bpp value with a more specific format type to get
10bpc+ccs working as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Sprinkle some asserts into rendercopy to make sure we don't try
to exceed the render engine surface size/stride limitations.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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To handle drawing 16 bpp formats correctly with odd x/w, we need to
use the correct bpp to rendercopy. Now that everything sets bpp in
igt_buf, fix the rendercopy support to use it and set the correct
format.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[mlankhorst: Add assert(src->bpp == dst->bpp)]
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The gen4 code was pushed without being fixed up for the constification
of igt_render_copyfunc_t
../lib/intel_batchbuffer.c: In function ‘igt_get_render_copyfunc’:
../lib/intel_batchbuffer.c:837:8: warning: assignment to ‘igt_render_copyfunc_t’ {aka ‘void (*)(struct intel_batchbuffer *, struct _drm_intel_context *, const struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, const struct igt_buf *, unsigned int, unsigned int)’} from incompatible pointer type ‘void (*)(struct intel_batchbuffer *, drm_intel_context *, struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, struct igt_buf *, unsigned int, unsigned int)’ {aka ‘void (*)(struct intel_batchbuffer *, struct _drm_intel_context *, struct igt_buf *, unsigned int, unsigned int, unsigned int, unsigned int, struct igt_buf *, unsigned int, unsigned int)’} [-Wincompatible-pointer-types]
copy = gen4_render_copyfunc;
Fixes: 61370b2d43db ("lib/rendercopy: Add gen4/5 rendercopy")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Add rendercopy implementation for gen4/5. Basic structure
copied from the gen6 implementation, and the gen4/5 specific
bits were mostly lifted from sna.
v2: Renamed registers definitions, which are GEN4 specific
to include that prefix (Lukasz)
v3: Rebase and checkpatch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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