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Add a library function to read the current state of mem_sleep
Used by suspend tests without i915 to skip s3 cycle, if platform has
default state as s2idle. Reduces CI Execution time
v2: Addressed cosmetic review comments (Anshuman)
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
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Also drive-by, change %s strerror(errno) to the equivalent %m.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Probing alignment/offset (A/O) in default context works properly only
when there're no processes which competes on same vm space. To avoid
risk that single probe will be called on already used offset in another
process lets use dedicated context for this purpose if possible.
In other words when forking occur without A/O cache filled (subject of
COW) children will exercise A/O individually. Using same default context
leads to risk of probing offset which is in flight in another child
thus we can get different A/O. Such behavior is not allowed as allocator
infrastructure requires same type, strategy and alignment on single vm.
We expect coherent A/O in different children so we try to use separate
context to fill this requirement.
v2: on old gens where're no logical contexts use default context
v3: adding missing condition for context destroy (Matt)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/5729
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Added convenience function returning number of GTs.
Reads number of GT sysfs entries and returns number
of GTs, if atleast one GT entry is found.
v2: Add an assert condition to check for atleast one GT entry. (Priyanka)
Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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As igt_sysfs_gt_open() is being used in for_each_sysfs_gt_dirfd,
remove unwanted igt_debug_on in igt_sysfs_gt_open().
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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RPS sysfs files exposed by the kernel can either be in per-gt sysfs or in
the per-device legacy sysfs. Add helpers to read/write these files in
either of the two sets of locations.
v2: Added function descriptions (Kamil)
Separated patch from "lib/igt_sysfs: Add helpers to iterate over GTs"
v3: Improved checks in igt_sysfs_dir_id_to_name() (Ashutosh)
Code review comments (Kamil)
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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Provide iterators to:
- construct the subdirectory string for a gt
- obtain fd for the subdirectory of the interface
v2: Separated out RPS functionality into seaparate patch (Ashutosh)
v3: Removed unnecessary igt_debug_on's (Ashutosh)
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Priyanka Dandamudi <Priyanka.dandamudi@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Adding Raptor lake platform definitions
v2: Modifying intel_device_info.c in seperate commit (Petri)
Earlier changes done in i915_pciids.h commit
Signed-off-by: Adam Miszczak <adam.miszczak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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This synchronizes with kernel commit
72c3c8d6e5275 ("drm/i915/rpl-p: Add PCI IDs")
to bring in RPL-P PCI IDs.
v2: Corresponding kernel commit added in commit message (Petri)
v3: Copying the header from 72c3c8d6e5275 also brings in these RPL-S ids: 0xA78A 0xA78B (Petri)
Signed-off-by: Adam Miszczak <adam.miszczak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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The patch "95898ed6856e drm/i915: Drop debugfs/i915_next_seqno"
removed this file so remove the use of this in igt as well.
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Ensure we get sensible responses for both valid and invalid usage of
this query item.
Note that unlike the traditional topology query we do not try to compare
the values returned against the old I915_PARAM ioctl. Xe_HP already
uses a full 32-bit mask for subslices and we expect upcoming platforms
to increase the mask size to 64 or beyond (i.e., the hardware starts
using multiple registers to express the mask); since the old I915_PARAM
ioctl can only return a 32-bit value it will be unable to express the
full mask for upcoming platforms.
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
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[why & how]
The PSR state read helper should return an integer which is not
the same as PSR state enumeration item for the case of debugfs
interface opening fail. Currently it return false which is casted
to 0 that is the same as PSR_STATE0, this is incorrect.
Instead of returning 0, a negative (e.g. -1) value is returned
when debugfs interface of PSR state opening fails. And adding the
check of such negative value in amd_psr test case as well.
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
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[why & how]
AMDGPU DM exposure a debugfs interface entry of visual confirm
debug option which is configured for debugging like surface
programming. It also supports the PSR feature visual confirm
debugging. We'd add helpers to read/write visual confirm debug
option from/to such interface entry.
The interface entry "amdgpu_dm_visual_confirm" is located in the
debugfs directory. We'd add the enumeration of visual confirm
option which is aligned to the amdgpu kernel driver.
Changes in v2:
--------------------
- close the file descriptor before return in helper of setting
visual confirm
- drop the '_dm_' from helpers to check visual confirm debugfs
existence, get/set option from/to the debugfs entry.
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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Tests and intel_gpu_top will share common code for parsing this file.
v2:
* Fix key-value parsing if valid key line ends with ':'.
* Return number of drm keys found.
* Add DRM_CLIENT_FDINFO_MAX_ENGINES. (Umesh)
* Always zero terminate read buffer. (Umesh)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
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mei_gsc binds to an aux device exposed by i915, so it depends on it and
need to be removed before we can unload i915.
On platforms with a GSC, the mei components (pxp, hdcp) depend on
mei_gsc, so those need to be unloaded first.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alexander Usyskin <alexander.usyskin@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Modprobing i915 can result in other dependent modules being loaded
automatically as a follow up. This means that by the time the i915
load function returns these modules may still be going through their
init, so if we try to immediately unload i915 again we will fail with
an -EBUSY. To avoid this, if the module load is still in progress, wait
for it to complete before unloading.
v2: move the wait to igt_kmod_unload_r (Ashutosh)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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There is create function with relocations, so add its
counterpart without it.
v3: moved down after intel_bb_create_with_relocs_and_context,
added function description (Zbigniew review)
v2: change to HIGH_TO_LOW allocation (Zbigniew)
Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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kms_atomic's test-only sub-test prepares only one primary plane
but igt_plane_commit() tries to commit all the primary planes.
For drivers having only one primary plane per display still
work fine but when there is more than one primary plane, since
FB_ID is not assigned for the second one, the API
igt_primary_plane_commit_legacy() ends up calling the CRTC
disable path incorrectly and hence failing the test.
Since only one primary plane has been prepared, commit only
that one by matching the primary_plane handle with the plane
which has been passed.
changes in v2:
- compare the primary_plane and current plane's handle
to determine whether the current plane is the primary
plane instead of comparing the index
Reviewed-by: Mark Yacoub <markyacoub@chromium.org>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
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This tests is intended to reproduce a issue found in real world but
the software enviroment to reproduce it was not easy to duplicate, so
this test was written to make it easy to reproduce it, debug and fix.
To make sure we don't regress it in the future here the test.
It mixes page flips and frontbuffer writes in primary and overlay
planes and expects that PSR stays active after each subtest without
any warnings or underruns.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
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ADL-N and ADL use the same OA metrics. Add ADL-N support
for OA tests.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
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The XY_COLOR_BLT instruction used by igt_draw's blitter implementation
doesn't support tile-4 (plus we've heard informally from the hardware
team that the instruction is deprecated in general). Switch to
XY_FAST_COLOR_BLT to perform our solid fills on DG2. This instruction
will also allow us to extend the igt_draw support to 64bit+ color depths
in the future too if we have tests that start wanting to test that.
Note that we don't currently pass enough information down to this
routine to pick an appropriate value for the smem vs lmem performance
hint bit, but that doesn't impact the output generated.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
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[why]
We need a test case to imitate the multiplane overlay (MPO) video
playback use case and check PSR-SU enablement during test run.
[how]
The test run only works for PSR-SU capable sink device and skip for
any non-eDP or non-PSR-SU connector or kernel driver not supporting
PSR-SU feature.
To emulate the video playback and MPO scenario, we use overlay plane
w/ size of addressable and primary plane w/ size of quater of overlay
acting as video playback region.
Create couple of framebuffers w/ size of primary plane and with
the pattern of vertical color strip on different position on the
FB. During test run, we flip the primary framebuffer and expect the
visual effect of moving strip within the region of primary plane
acting as video playback. The primary plane during test run is not
moving position or resizing.
changes in v3
----------------
* make the indentation consistent to use tabs
* newline after for loop for readability
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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[why]
The existed amdgpu debugfs helpers to check existance/support of
connector's debugfs entry have a bunch of code redundant. Since
the generic debugfs interface checker is defined, we'd refactor
to avoid code redundancy.
[how]
- call generic helper igt_amd_output_has_debugfs() for debugfs
interface existence check for DSC, HPD, LINK SETTING, PSR CAP
etc.
- call psr state check helper for existed basic PSR test case.
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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[why]
For AMDGPU devices, we'd check the PSR state via reading from the
debugfs interface for a given eDP connector, where the debugfs
interface path locates at
<debugfs_root>/dri/0/eDP-X/psr_state
where 'X' is the eDP connector index.
[how]
define and add the helper to check if PSR state debugfs interface
is supported in driver, and the helper to read PSR state from the
debugfs interface.
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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[why]
For AMDGPU devices, the debugfs interface to check sink PSR cap
is a bit different from that of i915, i.e. the interface is located
in the path
<debugfs_root>/dri/0/eDP-X/psr_capability
where 'X' is eDP connector index.
We need such debugfs interface to check if the sink device and the
x86 driver supports PSR or PSR-SU capabilities.
[how]
define and add the helpers to read from connector debugfs interface
For sink device PSR cap check:
- for PSR1 device, the psr version DPCD be 0x1
- for PSR-SU device, the psr version DPCD be either 0x3 or 0x4.
For amdgpu x86 driver PSR support check:
- for PSR1, expect to contain sub-string "yes"
- for PSR-SU, expect to contain sub-string "yes [0x1]"
changes in v2
-------------------
* fix the typo in string comp within the helper to read from
psr cap debugfs interface
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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[why]
From eDP 1.5 (eDP 1.4b SCR adopted), a higher version of PSR-SU eDP
panel, i.e. version 0x4, is added into spec. Need to treat such PSR
panel as PSR capable sink device.
[how]
validate the PSR capable sink for higher PSR version 0x4.
Cc: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: David Zhang <dingchen.zhang@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
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Add a helper function to read the panel's deep-color capability
from EDID.
For EDID 1.3, we need to read deep color capability from Vendor
Specific Data Block, and for EDID 1.4 read bit depth from Video
Input Definition.
Vendor Specific Data Block for "HDMI Licensing LLC":
---------------------------------------------------------
| Byte| Bit | Description |
---------------------------------------------------------
| | Bit 6 | 16-bit-per-channel deep color (48-bit)|
| 6 | Bit 5 | 12-bit-per-channel deep color (36-bit)|
| | Bit 4 | 10-bit-per-channel deep color (30-bit)|
---------------------------------------------------------
Video Input Definition (1-byte):
* Video Signal Interface: Bit 7 (1:Digital, 0:Analog)
* Color Bit Depth: Bits 6 → 4
-----------------------------------------------------
| 7 | 6 5 4 | 3 2 1 0 | Color Bit Depth: Bits 6 → 4 |
|---|-------|---------|-----------------------------|
| 1 | 0 0 0 | x x x x | Color Bit Depth is undefined|
| 1 | 0 0 1 | x x x x | 6 Bits per Primary Color |
| 1 | 0 1 0 | x x x x | 8 Bits per Primary Color |
| 1 | 0 1 1 | x x x x | 10 Bits per Primary Color |
| 1 | 1 0 0 | x x x x | 12 Bits per Primary Color |
| 1 | 1 0 1 | x x x x | 14 Bits per Primary Color |
| 1 | 1 1 0 | x x x x | 16 Bits per Primary Color |
| 1 | 1 1 1 | x x x x | Reserved (Do Not Use) |
-----------------------------------------------------
For deep-color we need atleast 10-bits.
V2:
* Add EDID 1.3 support
V3:
* Fix reading VSDB flags1 for deep-color
V4:
* Separate functions for EDID 1.3 & EDID 1.4
* Other minor cleanups
V5:
* Fine tune the logic to identify DC support for RGB format
V6:
* Cleanup
V7:
* Cleanup: Fix typos, comments and rename function names
* Update max_bpc() to capture the prop value
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
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Blitter commands became complicated thus manual bitshifting is error
prone and hard debugable - XY_BLOCK_COPY_BLT is the best example -
in extended version (for DG2+) it takes 20 dwords of command data.
To avoid mistakes and dozens of arguments for command library provides
input data in more structured form.
Currently supported commands:
- XY_BLOCK_COPY_BLT:
a) TGL/DG1 uses shorter version of command which doesn't support
compression
b) DG2+ command is extended and supports compression
- XY_CTRL_SURF_COPY_BLT
- XY_FAST_COPY_BLT
Source, destination and batchbuffer are provided to blitter functions
as objects (structs). This increases readability and allows use same
object in many functions. Only drawback of such attitude is some fields
used in one function may be ignored in another. As an example is
blt_copy_object which contains a lot of information about gem object.
In block-copy all of data are used but in fast-copy only some of them
(fast-copy doesn't support compression).
v2-v3: address review comments (Kamil)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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If driver is able to report capabilities we want to use them in easy way.
For example it can support blitter "block_copy" (XY_BLOCK_COPY_BLT
command) and reports it in sysfs. We add then capabilities helpers to
read these properties. Helpers allows checking does driver knows
capability (by checking sysfs "known_capabilities" file) and supports it
(by checking sysfs "capabilities" file). Dedicated helper was added to
verify "block_copy" capability.
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Add new library intel_mocs for mocs settings.
v2: make definitions and struct private (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Handling batchbuffers with softpin requires tracking its state otherwise
we can write to inflight batchbuffer and encounter gpu hang. Gem pool
adds such tracking (similar to libdrm bo cache) and provides free and
ready to use bo. If pool has no free bo new one is created what means pool
can be growing during test execution. When test completes freeing buffers
and memory is called from igt_core so no additional cleanup is necessary.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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Macros from i915_pciids.h are only needed in one place,
intel_device_info.c, and that already includes the header. Remove an
unnecessary global include.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Make sure that we can continue to create buffers, primarily to service as
framebuffers for scanout, even while the device is wedged.
v2:
- Deleted gem_memory_topology.[ch] and moved it's content
to intel_memory_region.[ch]. [Ashutosh]
- Fixed checkpatch.pl warning.
v3:
- Added igt_describe() for new added tests. [Kamil]
Cc: CQ Tang <cq.tang@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Commit 5f3cfa485eb4 ("lib: Use safe wrappers around libpciaccess
initialization functions") took care of not leaking memory allocated by
pci_system_init() but didn't take care of users potentially attempting to
reinitialize global data maintained by libpciaccess. For example,
intel_register_access_init() mmaps device's PCI BAR0 resource with
pci_device_map_range() but intel_register_access_fini() doesn't unmap it
and next call to intel_register_access_init() fails on attempt to mmap it
again.
Fix it, and also provide intel_mmio_unmap_*() counterparts to public
functions intel_mmio_use_pci_bar() and intel_mmio_use_dump_file().
v2: apply last minute fixes, cached but unfortunately not committed before
sending
v3: use .pci_device_id field content as an indicator of arg initialization
via intel_register_access_init(),
- improve checks of argument initialization status,
- shorten warning messages (Kamil),
- don't fill .mmio_size field until initialization succeeds (Kamil)
v4: fix condition of forcewake release, broken in v3,
- improve comments and warning messages (Kamil)
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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We need to implement the tile-4 math to convert x,y coordinates to
buffer offsets and vice versa for cases where we're using the CPU to
tile/detile rather than a GPU engine (e.g., the mmap_cpu and pwrite
subtests for kms_draw_crc).
The bspec description of tiling-4 is very confusing/misleading, but the
implementation here does match the tile-4 content generated by GPU
engines and recognized properly by the display controller.
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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Introduce support for the new Tile4 format, which is
4K column-major tiles consisting of 64B row-major subtiles,
with same base structure as Y Tile(16B OWords * 4)
v2: place I915_TILING_4 correctly.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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Add tiling 4 support flag for DG2 platform. This is similar that
we have defined in kernel i915_pci.c intel_device_info() for DG2.
v2: rebase
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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The present gen12 rendercopy is not compatible with gen21p71(dg2).
Add rendercopy support for dg2 and introduce gen12p71_render_copyfunc
function to use it.
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Discrete cards can have different memory alignment requirements
when objects used in execbuffer comes from different memory regions.
Lets use safe alignment which should be fine regardless objects
location.
v2: ensure passed alignment is power of two (Kamil)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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Add an api to support the CTA range color square video test
pattern as explained in section 3.2.5.3 of the DP CTS
specification. This pattern is required for supporting
the CTA range for RGB formats.
Also rename the existing api igt_fill_cts_framebuffer to
igt_fill_cts_color_ramp_framebuffer to highlight the
pattern type.
changes in v3:
- fix compilation warnings by reformatting code
changes in v2:
- removed redundant pointers
- fixed overall formatting issues
- Fixed author name
Signed-off-by: Maitreyee Rao <maitreye@codeaurora.org>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Not all systems supports dma-buf or supports it partially thus tests which
relies on this functionality should be skipped. Partially means some
memory regions can support it whereas other not. Add a helper function
which will verify dma-buf support on memory regions and create a set of
those supported.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
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In 4d9396e67930 we have started storing the opts with which the spin was
created as part of igt_spin_t. The ahnd stored as part of igt_spin_t is
therefore redundant. We can get ahnd from opts.ahnd.
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Jasmine Newsome <jasmine.newsome@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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For DG2 and beyond regions alignment may vary so many tests would need
to be rewritten to handle this constraint. As Ashutosh noticed most of
tests can use safe alignment as a default.
Adopt intel-allocator to use safe or user defined power-of-two alignment.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Suggested-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Save the opts with which the spin was created
as part of the spin so that the opts are available
in case they are needed.
Signed-off-by: Jasmine Newsome <jasmine.newsome@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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The library provides igt_device_get_pci_device() function that allows to
get access to a PCI device from an open DRM device file descriptor. It
can be used on VF devices as long as a DRM driver is bound to them.
However, SR-IOV tests may want to exercise VF PCI devices created by a PF
without binding any DRM driver to them.
While keeping the API of igt_device_get_pci_device() untouched, extend API
of its underlying helper __igt_device_get_pci_device() with an extra
argument for specifying VF ID of the requested PCI device and expose this
function as public.
v2: refresh on top of IGT libpciaccess wrappers and drop previously added
but no longer needed error unwind path and recommendations for users
on calling pci_system_cleanup() after use (Chris),
- fix incorrect validation of snprintf() result and misaligned
formatting of igt_warn_on_f() arguments.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: Chris Wilson <chris.p.wilson@intel.com>
[jkrzyszt: DOC fix and wording improvement]
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This reverts commit c220c60bb4679e2e9cdf8accbf90f888e6819456.
Incorrect version of the patch has been pushed, sorry.
Signed-of-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
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The library provides igt_device_get_pci_device() function that allows to
get access to a PCI device from an open DRM device file descriptor. It
can be used on VF devices as long as a DRM driver is bound to them.
However, SR-IOV tests may want to exercise VF PCI devices created by a PF
without binding any DRM driver to them.
While keeping the API of igt_device_get_pci_device() untouched, extend API
of its underlying helper __igt_device_get_pci_device() with an extra
argument for specifying VF ID of the requested PCI device and expose this
function as public.
While being at it, fix pci_system_cleanup() not called on errors and
instruct users to call it for symmetry when the obtained struct pci_device
is no longer needed.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
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Kmod igt library functions like igt_i915_driver_{load, unload}
uses process exit IGT_EXIT_{FAILURE, SKIP, SUCCESS} return values.
Let these function return actual return values
from returned igt_kmod_{load, unload} functions.
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Suggested-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
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Multiple calls to igt functions using pci_system_init() provided by
libpciaccess result in memory leaking if not followed by its counterpart
pci_system_cleanup() before next use. On the other hand, calling
pci_system_cleanup() can affect other users which still depend on global
data initialized by pci_system_init().
Introduce safe IGT wrappers around those libpciaccess functions and use
those wrappers in IGT library and tests.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
[jkrzyszt: shorten excessive long name of hidden variable (Chris)]
Reviewed-by: Chris Wilson <chris.p.wilson@intel.com>
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Add silent __igt_i915_driver_unload(), which will not
print any warning in case of passed argument is NULL.
This will be used by some igt test, which marks i915
module busy and expect i915 module unload to fail.
These tests requires a silent lib function to unload
the i915 module correctly.
v2:
- Change commit log. [Ashutosh]
- Change whom to who. [Ashutosh]
- When aux audule unload fails mark who with module name. [Ashutosh]
- Keep same type of return type in
__igt_i915_driver_unload(). [Ashutosh]
Cc: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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