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A few more tests that use i915/gem without first checking that the GPU is
working.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Apply the new API to all call sites within the test suite using the following
semantic patch:
// Semantic patch for replacing drm_open_any* with arch-specific drm_open_driver* calls
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identifier i =~ "\bdrm_open_any\b";
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- i()
+ drm_open_driver(DRIVER_INTEL)
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identifier i =~ "\bdrm_open_any_master\b";
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- i()
+ drm_open_driver_master(DRIVER_INTEL)
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identifier i =~ "\bdrm_open_any_render\b";
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- i()
+ drm_open_driver_render(DRIVER_INTEL)
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identifier i =~ "\b__drm_open_any\b";
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- i()
+ __drm_open_driver(DRIVER_INTEL)
Signed-off-by: Micah Fedke <micah.fedke@collabora.co.uk>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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Add a header that includes all the headers for the library. This allows
reorganisation of the library without affecting programs using it and
also simplifies the headers that need to be included to use the library.
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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gem_bad_blit.c: In function ‘bad_blit’:
gem_bad_blit.c:89:3: warning: right shift count >= width of type [enabled by default]
OUT_BATCH(BAD_GTT_DEST >> 32); /* Upper 16 bits */
v2: remove extraneous ()
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Gen8 Onwards use 48 bit addressing for src and dst base
addresses. This patch fixes this for destination base address.
Signed-off-by: Praveen Paneri <praveen.paneri@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Since relocations are variable size, depending upon generation, it is
easier to handle the resizing of the batch request inside the
BEGIN_BATCH macro. This still leaves us with having to resize commands
in a few places - which still need adaption for gen8+.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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igt-core.h/c provides some macros and initialisation
functions to support the tests but some of the single
tests do not use these. Modifying these tests to use
the igt_simple_main macro and igt_simple_init function
is the first step towards a consistent command line
across all tests.
Signed-off-by: Tim Gore <tim.gore@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Brought a few missing headers to light in ioctl_wrappers.h, too.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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This provides a macro that allows us to update all the arbitrary blit
commands we have stuck throughout the code. It assumes we don't actually
use 64b relocs (which is currently true). This also allows us to easily find
all the areas we need to update later when we really use the upper dword.
This block was done mostly with a sed job, and represents the easier
in test blit implementations.
v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START
CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
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Just a wholesale rollout for now, we can refine later on.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Depends on libdrm 057fab3382c02af54126ce395c43d4e6dce9439a
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31123
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add four new tests for error the error handling cases:
- gem_bad_address - store to a bad address, should generate a protection or
page table error
- gem_bad_batch - try to execute a bad batch, should generate a protection,
invalid instruction or page table error
- gem_bad_blit - blit to an invalid location, should generated a protection
or page table error
- gem_hang - hang the GPU on an event that will never happen, test hang
detection & recovery code
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