summaryrefslogtreecommitdiff
path: root/tests/i915/api_intel_bb.c
AgeCommit message (Collapse)Author
2022-06-13tests/api_intel_bb: Add crc32 checking test for DG2Zbigniew Kempczyński
Add simple test which compares crc32 sums and calculation times on cpu and gpu. v2: - addressing review comments - igt_debug + igt_time_elapsed (Kamil) - exercise crc for size smaller than page size v3: - change clock_gettime() to igt_gettime() (Petri) - add crc_n for decrease execution time (Zbigniew) Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2022-02-07tests/api_intel_bb: Handle different alignments in delta-checkZbigniew Kempczyński
As newer gens can diverge with safe alignments adopt delta-check to handle this. Idea of the test is to verify intel-bb delta calculation for objects, especially we're crossing 32bit address boundary. For example: 1. where safe alignment == 0x1000 (page size) object size will be 0x3000 and it will be pinned at 0xffff_f0000. MI_STORE_DWORD_IMM will be at 0x1_0000_1000 2. where safe alignment == 0x200000 (discrete) object size will be 0x200200 and it will be pinned at 0xffe0_0000. MI_STORE_DWORD_IMM will also be at 0x1_0000_1000 Change should also apply to other alignments (if any). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Tested-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2022-02-02i915/api_intel_bb: Correct size for munmapZbigniew Kempczyński
If we don't release the entirety of the mmap we create, it still holds a reference to the fd/object. v2: changed to intel_buf_size() (ZK) Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-11-24tests/api_intel_bb: Use alignment only when kernel support itZbigniew Kempczyński
Test uses intel-bb api so we're responsible to pass valid alignment or 0 when it is not supported by the kernel. Add appropriate check to avoid failing on such kernels. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-10-08lib: Typechecking minmaxChris Wilson
Add typechecking to the min/max macros and make their locals truly unique-ish to reduce the risk of shadowing. v2: small bug fix, write also height coordinate on rotation test. (jheikkil) v3: Fix up a couple of other max/max_t instances (Ashutosh) Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2021-10-05lib/intel_bufops: Store gem bo sizeZbigniew Kempczyński
intel_buf is keeping its size which may differ to underlying gem bo size. Introduce keeping bo_size field which is used along with softpin mode - like in intel_bb. Patch also should remove previous discrepancy where intel_buf_bo_size() returned requested (not gem bo size). From now on user has an access to: 1. raw buffer size - intel_buf_size() - function returns how buffer data really takes in the memory 2. gem bo buffer size - intel_buf_bo_size() - function returns how big underlying gem object is Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-10-05lib/intel_bufops: Rename intel_buf_bo_size() -> intel_buf_size()Zbigniew Kempczyński
To avoid confusion with intel_buf_bo_size() which for some buffers can return size not equal to underlying gem bo size rename it to intel_buf_size(). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-07-08lib/intel_bb: Remove intel_bb_assign_vm and tests (v2)Jason Ekstrand
It's not used by anything other than the tests for that functionality and it relies on setting the VM via SET_CONTEXT_PARAM which is deprecated. Delete it for now. We can add it back in later if it's actually useful and do it properly then. v2 (Zbigniew Kempczyński): - Also remove intel_bb_detach_intel_buf() Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-05-27lib/i915/gem_create: Add gem_create_extAndrzej Turko
Add a wrapper for gem_create_ext ioctl (a version of gem_create that accepts extensions). In preparation for the driver change implementing it, a local definition of its id and necessary structs have been added, which are to be erased as soon as those definitions appear in the i915_drm.h file. The new ioctl wrapper is added to a separate file. For consistency the wrapper of the old ioctl, gem_create is moved from ioctl_wrappers to gem_create. Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com> Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Chris P Wilson <chris.p.wilson@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Check switching vm in intel-bbZbigniew Kempczyński
For more vm-controlled scenarios we have to support changing vm in the intel-bb. Test verifies allocator is able to provide two vm's which can be assigned to used within intel-bb context. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Use allocator in delta-check testZbigniew Kempczyński
We want to use address returned from emit_reloc() but do not call kernel relocation path. Change intel-bb to use allocator to fully control addresses passed in execbuf. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Add simple intel-bb which uses allocatorZbigniew Kempczyński
A simple test which uses allocator and can be easily copy-paste when intel-bb is used for batchbuffer creation. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Add purge-bb testZbigniew Kempczyński
Check address acquired is same after purging bb. For relocations we expect 0 twice, for allocator release and alloc same address. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Add compressed->compressed copyZbigniew Kempczyński
Check aux pagetables are working when more than one compressed buffers are added. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Modify test to verify intel_bb with allocatorZbigniew Kempczyński
intel_bb was adopted to use allocator. Change the test to verify addresses in different scenarios - with relocations and with softpin. v2: adding intel-buf to intel-bb inserts addresses so they should be same even if intel-bb cache purge was called Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13tests/api_intel_bb: Remove check-canonical testZbigniew Kempczyński
As intel-bb uses internally decanonical address for objects/intel_bufs checking canonical bits makes no sense anymore. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Arjun Melkaveri <arjun.melkaveri@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Add tracking intel_buf to intel_bbZbigniew Kempczyński
From now on intel_bb starts tracking added/removed intel_bufs. We're safe now regardless order of intel_buf close/destroy or intel_bb destroy paths. When intel_buf is closed/destroyed first and it was previously added to intel_bb it calls the code which removes itself from intel_bb. In destroy path we go over all tracked intel_bufs and clear tracking information and buffer offset (it is set to INTEL_BUF_INVALID_ADDRESS). Reset path is handled as follows: - intel_bb_reset(ibb, false) - just clean objects array leaving cache / allocator state intact. - intel_bb_reset(ibb, true) - purge cache as well as detach intel_bufs from intel_bb (release offsets from allocator). Remove intel_bb_object_offset_to_buf() function as tracking intel_buf updates (checks for allocator) their offsets after execbuf. Alter api_intel_bb according to intel-bb changes. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_batchbuffer: Integrate intel_bb with allocatorZbigniew Kempczyński
Refactor the intel-bb interface to introduce the IGT allocator for specifying the position of objects within the ppGTT. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-04-13lib/intel_bufops: Change size from 32->64 bitZbigniew Kempczyński
1. Buffer size from 32 -> 64 bit was changed to be consistent with drm code. 2. Remember buffer creation size to avoid recalculation. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Petri Latvala <petri.latvala@intel.com>
2021-03-24tests/api_intel_bb: Fix invalid munmap in render-ccsZbigniew Kempczyński
Fix bug which leads to SIGSEGV in api_intel_bb@render-ccs test. Instead of pointer unmap was done on intel_buf what was wrong. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2020-12-17i915/api_intel_bb: Only assert objects are unmoved for full-ppgttChris Wilson
If we let an object idle in a shared GTT, it may be evicted by the kernel in favour of another client. Thus, we have to be very careful when asserting that two different executions of the same object will be at the same address. If there's an idle point between the two asserts, it will only be guaranteed to hold for full-ppgtt. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2810 References: c20db20a7cd7 ("i915/api_intel_bb: Only assert objects are unmoved for full-ppgtt") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2020-12-03i915/api_intel_bb: Only assert objects are unmoved for full-ppgttChris Wilson
If we let an object idle in a shared GTT, it may be evicted by the kernel in favour of another client. Thus, we have to be very careful when asserting that two different executions of the same object will be at the same address. If there's an idle point between the two asserts, it will only be guaranteed to hold for full-ppgtt. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2754 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2020-11-11tests/api_intel_bb: Verify delta is properly added in emit relocationZbigniew Kempczyński
When delta is added to buffer address and sum exceeds 32bits verify emit relocation contains properly set low + high address dwords. v2: Simplify code and add write/read check (suggested by Imre) v3: Leave MI_STORE_DWORD_IMM for gens8+ (with 48bit ppgtt) References: https://patchwork.freedesktop.org/series/83644/ Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reported-by: Imre Deak <imre.deak@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-10-01lib/intel_batchbuffer: Prepare batch to use in allocator infrastructureZbigniew Kempczyński
With upcoming of allocator code we need to ensure batch will execute with appropriate context. If mismatch between allocator data and batch could lead to strange or wrong results. All functions which could change context in execbuf called from intel_bb were removed. As an allocator requires size (which was not previously required in intel_bb) adding object to intel_bb is now mandatory. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16tests/api_intel_bb: add render testsZbigniew Kempczyński
Check render / render-ccs tests works fine on all supported gens. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16tests/api_intel_bb: test flags are cleared on bb resetZbigniew Kempczyński
Current intel_bb implementation keeps objects in the bb cache so subsequent executions pass these objects also to execbuf. Check flags are cleaned after reset. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-09-16lib/intel_batchbuffer: use canonical addresses for 48bit ppgttZbigniew Kempczyński
For all EXEC_OBJECT_PINNED objects we need to be sure address passed must be in canonical form. Until IGT allocator will be written just limit 48 and 47 bit gtt tables to 46 bit only. We don't want to play with canonical addresses with 47-bit set to 1 (and then 63:48). Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-08-21i915/bb: Cleanup 32bit printfsChris Wilson
Use PRIx64 for 64b addresses on a 32b build. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2020-07-06lib/bufops: add surface array to cover ccs pgtableZbigniew Kempczyński
Rendercopy for gen12+ requires additional aux pgtable. Alter bufops and tests to use surface[] and ccs[] instead aux. This step is required to properly rewrite handling aux pgtable to use with intel_bb. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-07-03tests/api_intel_bb: Add intel_bb API testZbigniew Kempczyński
IGT code contains some mechanisms which are quite large and cover different gens so they deserve own api_* checks. Starting with api_intel_bb verify intel_bb functions work as expected. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-08 05:09:59 +0000