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2022-07-07i915/gem_exec_fence: Support dg2+ batch predicationChris Wilson
On dg2+, MI_BATCH_BUFFER_START | MI_USE_PREDICATE switches to using the MI_SET_PREDICATE_RESULT register and requires bit 0 to be set to skip the looping MI_BATCH_BUFFER_START. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5463 Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
2022-06-29tests/i915/gem_exec_fence : Add subtests descriptionJanga Rahul Kumar
Add test description for below subtests: basic-busy-all, basic-wait-all, busy-hang-all, wait-hang-all, basic-busy, basic-wait, basic-await, nb-await. v2 : Modified subtests description. Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar@intel.com> Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
2022-06-13lib/intel_reg: Add common MI_* macros to remove duplicatesZbigniew Kempczyński
In few tests we got some MI_* duplicates (MI_MATH for example). Add common definitions in intel_reg.h and remove local definitions in the tests. v2: Definitions MI_LOAD_REGISTER_MEM_GEN8 was removed so from now on user will need to encode length on it own. : Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2022-01-26tests/gem_exec_fence: Adopt to use no-reloc in three syncobj subtestsZbigniew Kempczyński
Three subtests: - syncobj-timeline-chain-engines - syncobj-stationary-timeline-chain-engines - syncobj-backward-timeline-chain-engines were not previously rewritten to use no-reloc. Using allocator is not necessary in this case, we need to softpin only counter object. Offsets for all batches are chosen by the kernel as their location within gpu vm doesn't matter. Some explanation is required regarding batchbuffer updates for each iteration. Before introducing softpin all batchbuffers were touched by the relocations what introduces stalls between them during execution. These stalls could be removed as batchbuffers don't change their contents for each iteration. But I decided to keep this behavior intact for relocations changing it only for no-reloc mode. With softpinning batchbuffer for each engine is written once (for first iteration) so next execbuf reuses same batch. This removes stalls on subsequent iterations as batchbuffer for each engine is ready immediate after completion. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2022-01-18tests/i915/gem_exec_fence: Configure correct contextJohn Harrison
The update to use intel_ctx_t missed a line that configures the context to allow hanging. Fix that. Fixes: 09c36188b ("tests/i915/gem_exec_fence: Convert to intel_ctx_t (v2)") Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com>
2022-01-18lib/store: Refactor common store code into helper functionJohn Harrison
A lot of tests use almost identical code for creating a batch buffer which does a single write to memory and another is about to be added. Instead, move the most generic version into a common helper function. Unfortunately, the other instances are all subtly different enough to make it not so trivial to try to use the helper. It could be done but it is unclear if it is worth the effort at this point. This patch proves the concept, if people like it enough then it can be extended. v2: Fix up object address vs store offset confusion (with help from Zbigniew K). v3: Cope with >32bit store_offset (review feedback from Matthew Brost). Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com>
2021-12-03i915/gem_exec_fence: Allow wait_bb to run on !rcsChris Wilson
From Haswell up until gen12, only rcs supports all the registers and MI commands required to build the wait batch; before Haswell MI does not support the required MATH operations nor the predication. However, after gen12 we may not always have rcs available and so require to run the delay on other command streamers, which requires us to use the appropriate mmio base for the alternate engine. Signed-off-by: Chris Wilson <chris.p.wilson@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2021-08-18tests/gem_exec_fence: Adopt to use allocatorZbigniew Kempczyński
For newer gens we're not able to rely on relocations. Adopt to use offsets acquired from the allocator. Three subtests are not covered here, there are: - syncobj-timeline-chain-engines - syncobj-stationary-timeline-chain-engines - syncobj-backward-timeline-chain-engines Due to sophisticated manner of the three tests mentioned above they will be subject of separate patch. At the moment CI depends on reloc version only so this doesn't introduce regression there and decreases coverage gap on no-reloc discrete runs. Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-08-06tests/i915/gem_exec_fence: use device_coherent mmapMatthew Auld
We lost explicit WC mmaps on discrete, where we now only support FIXED, however such mappings should be device coherent. In gem_exec_fence it looks like we can just use mmap__device_coherent, which should also work on discrete platforms, while still using an explicit WC mmap on integrated platforms. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-07-08tests/i915/gem_exec_fence: Convert to intel_ctx_t (v2)Jason Ekstrand
v2 (Jason Ekstrand): - Pass the context config to gem_submission_measure() Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-07-08tests/i915/gem_exec_fence: Move the engine data into inter_engine_context (v3)Jason Ekstrand
This will make iteration easier when we switch to intel_ctx_t. v2 (Zbigniew Kempczyński): - Require nengines > 0 in setup_timeline_chain_engines() v3 (Zbigniew Kempczyński): - Should have been nengines > 1 in setup_timeline_chain_engines() v3 (Jason Ekstrand): - Delete more intel_init_engine_list() in this patch Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-07-08lib/i915/gem_submission_measure: Take an optional intel_ctx_cfg_tJason Ekstrand
If provided, the engine (or ALL_ENGINES) is relative to the given context config. This is intended to be transitional. We'll get rid of all the __for_each_physical_engine stuff later. Signed-off-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-05-31Fixup clang compiler warnings.Maarten Lankhorst
Allows building cleanly with clang again. It complains about using invalid initialisers like char[][] = { 0 }. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2021-05-27lib/i915/gem_create: Add gem_create_extAndrzej Turko
Add a wrapper for gem_create_ext ioctl (a version of gem_create that accepts extensions). In preparation for the driver change implementing it, a local definition of its id and necessary structs have been added, which are to be erased as soon as those definitions appear in the i915_drm.h file. The new ioctl wrapper is added to a separate file. For consistency the wrapper of the old ioctl, gem_create is moved from ioctl_wrappers to gem_create. Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com> Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com> Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Chris P Wilson <chris.p.wilson@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Acked-by: Petri Latvala <petri.latvala@intel.com>
2020-12-30i915/gem_exec_fence: Fix legacy ring selectionChris Wilson
Fix the use of the legacy ring selection after the default context had an engine map installed. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-12-30i915: Rename legacy for_each_engine to for_each_ringChris Wilson
Improve the differentiation between the legacy ring selector ABI and the more recent engine selection API. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com>
2020-12-11i915/gem_exec_fence: Skip timeline tests if not supportedChris Wilson
Report we cannot run the timeline tests (SKIP) if the kernel doesn't support the API. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-12-11i915/gem_exec_fence: Check a submit chainChris Wilson
Submit a chain of spinners across all the engines, using the submit fence to launch them in parallel. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-11-16i915: Increase engine[] to fit the entire RING_MASKChris Wilson
As a stepping stone, increase the assumed 16 engines is enough for everyone, to cover the current RING_MASK, the maximum number of engines that can currently be selected during execbuf. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2020-10-15tests/i915: Treat gen as unsigned for forward compatibilityChris Wilson
We want to recognise future devices (gen = -1u) and treat them as an extension of the latest known device, which is typically true. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2020-08-21i915/gem_exec_fence: Cleanup 32bit printfsChris Wilson
Use PRI[ux]64 for printing 64bit values in a 32bit build. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
2020-08-07i915/gem_exec_fence: Use default-context for syncobj-timeline-waitChris Wilson
syncobj-timeline-wait is only exercising waits on the syncobj along a single timeline, for which it can use the universally available default context, and so not try and fail to create a HW context on very old platforms. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2308 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2020-08-05tests/i915/gem_exec_fence: add engine chaining testsLionel Landwerlin
Those tests are meant to verify the ordering while messing around with the timeline points. v2: Add munmap() (Chris) v3: Rebase Drop gem_context_set_all_engines() Fix subtest require on number of engines Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2020-08-05tests/i915/exec_fence: add timeline fence testsLionel Landwerlin
We can now give a tuple (handle, point_value) for timeline semaphores. v2: Fix up syncobj-timeline-repeat test (Lionel) Update following kernel rename v3: Add more ordering tests for syncobj/buffer handle state (Chris) v4: Rebase Drop gem_context_set_all_engines() v5: Fix syncobj-timeline-wait, ensure cloned context remains blocked on the spinner. v6: Ensure syncobj-timeline-wait can run on all generations, make the spinner use the same GEM context and spin on all engines. v7: Add test for multiple execbuffer extension nodes (syncobj-timeline-multiple-ext-nodes) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v4)
2020-05-28i915/gem_exec_fence: Reduce non-preemptible workloadDominik Grzegorzek
Non-preemptible spinners should be avoided as often as possible. gem_exec_fence@[basic-await, nb-await] has no reason to use non-preemptible workload, only hanging subtests need it. Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-26i915/gem_exec_schedule: Fix measurement of ring size to use right engineChris Wilson
gem_ring_measure_inflight() uses the legacy ring idx, whereas gem_exec_schedule is using the new dynamic ctx->engine[] indices. Mismatch and hanging tests ensue. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-05-12i915/gem_exec_(fence|schedule): Use WC mmapsChris Wilson
Since we are hiding our write hazards, gem_read() may not know if it needs to flush the CPU caches prior to reading back. As we lie to the kernel, use an explicit WC mmap for result readback. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1875 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-07i915/gem_exec_fence: Exercise blocking bonded fences on one engineChris Wilson
Like the parallel, but restricted to a single engine -- assumes we have timeslicing. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2020-05-07lib/i915: Split igt_require_gem() into i915/Chris Wilson
igt_require_gem() is a pecularity of i915/, move it out of the core. Similar opportunistic move of gem_reopen_driver() and gem_quiescent_gpu(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2020-05-07i915/gem_exec_fence: Verify timeslicing into the queueChris Wilson
Submit more coupled batches than can possibly fit into the ELSP and verify that we can slice between them all, while fulfilling the submit-fence. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-05-06i915/gem_exec_fence: Exercise timeslicing on submit-fenceChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-05-06i915/gem_exec_fence: Avoid mutable submission in 'parallel'Chris Wilson
Replace the open-coded spinner with igt_spin_t so that it is cmdparser friendly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-05-05i915/gem_exec_fence: Remove incomplete fence-flip testChris Wilson
I never finished writing this test. Its goal was to try and verify that a flip cannot happen before a fence is signaled; currently that is done by kms_busy. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-05-04i915/gem_exec_fence: Drop obsolete mutable requirementChris Wilson
The basic-await has been converted to use an igt_spin_t and so does not need the mutable check anymore. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-03-18lib: move upper_32_bits() and lower_32_bits() to libraryDaniel Mrzyglod
Move inline upper_32_bits() and lower_32_bits() function from tests to library. Functiom will be usefull for elsewhere use. v2: fix function description Cc: Katarzyna Dec <katarzyna.dec@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
2020-02-23i915/gem_exec_fence: Fix up parallel for-each-physicalChris Wilson
Put the test inside the igt_dynamic{} scope. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-02-12tests/i915/gem_exec_fence: Add __for_each_physical_engine to utilize all ↵saigowth
engines. Replaced the legacy for_each_engine* defines with the ones implemented in the gem_engine_topology library. Corrected subtest name in fast-feedback.testlist from, basic-busy-default --> basic-busy basic-wait-default --> basic-wait basi-await-default --> basic-await nb-await-default --> nb-await Signed-off-by: saigowth <sai.gowtham.ch@intel.com> Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
2020-01-28i915: Inject invalid CS into hanging spinnersChris Wilson
Some spinners are used with the intent of never ending and being declared hung by the kernel. In some cases, these are being used to simulate invalid payloads and so we can use an invalid command to trigger a GPU hang. (Other cases, they are simulating infinite workloads that truly never end, but we still need to be able to curtail to provide multi-tasking). This patch adds IGT_SPIN_INVALID_CS to request the injection of 0xdeadbeef into the command stream that should trigger a GPU hang. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
2020-01-20i915/gem_exec_fence: Fix fence leak for gen9-cmdparserChris Wilson
Fixes: 9e57f8a51d59 ("lib/i915: Add query to detect if engine accepts only ro batches") References: https://gitlab.freedesktop.org/drm/intel/issues/997 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
2019-12-03tests/i915/gem: remove igt_skip_on_simulation()Swati Sharma
Removing igt_skip_on_simulation() from all the gem tests since this feature is not supported anymore. v2: Rebase v3: Corrected build failure, because of deletion of gem_exec_blt.c Signed-off-by: Swati Sharma <swati2.sharma@intel.com> Signed-off-by: Karthik B S <karthik.b.s@intel.com> Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2019-11-23tests/i915/exec_fence: reuse syncobj helpersLionel Landwerlin
v2: Fix mistake in syncobj_busy() (Lionel) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-11-23tests/i915/exec_fence: switch to internal headersLionel Landwerlin
Drop local defines etc.. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-11-15lib/i915: Add query to detect if engine accepts only ro batchesKuoppala, Mika
If cmd parser is mandatory, batch can't be modified post execbuf. Some tests rely on modifying batch post execbuf. Give those tests a method to query if those modifications ever reach the actual engine command stream. v2: pull in the test changes, doh v3: class based query v4: rebase Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-11-13i915/gem_exec_fence: Avoid long preempt-off sleepsChris Wilson
The kernel is now enforcing that clients are not allowed to block higher priority contexts from accessing the GPU; one is no longer allowed to sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short enough not to anger the preempt-off checks while long enough for any ordinary GPU work to complete. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2019-11-13i915/gem_exec_fence: Allow GPU resets during hang checksChris Wilson
The pair of *-hang-all will generate sufficient hangs for the kernel to ban the client. This is unfortunate as it means all further tests are skipped. Ask nicely not to be banned. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2019-11-13i915/gem_exec_fence: KMS master is not requiredChris Wilson
Within this set of fence execution tests, we never once try to modeset; being KMS master is not required. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2019-10-26lib/i915: Use explicit iterator names in for_each_engine()Chris Wilson
Provide the iterator name as an explicit macro parameter so that it is known to the caller, and allows for them to properly nest loops over all engines. Fixes: ../tests/i915/gem_exec_schedule.c: In function ‘semaphore_noskip’: ../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a previous local [-Wshadow] for (const struct intel_execution_engine *e__ = intel_execution_engines;\ ^~~ ../tests/i915/gem_exec_schedule.c:653:2: note: in expansion of macro ‘for_each_physical_engine’ for_each_physical_engine(i915, other) { ^~~~~~~~~~~~~~~~~~~~~~~~ ../lib/igt_gt.h:84:44: note: shadowed declaration is here for (const struct intel_execution_engine *e__ = intel_execution_engines;\ ^~~ ../tests/i915/gem_exec_schedule.c:652:2: note: in expansion of macro ‘for_each_physical_engine’ for_each_physical_engine(i915, engine) { ^~~~~~~~~~~~~~~~~~~~~~~~ ../tests/i915/gem_exec_schedule.c: In function ‘measure_semaphore_power’: ../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a previous local [-Wshadow] for (const struct intel_execution_engine *e__ = intel_execution_engines;\ ^~~ ../tests/i915/gem_exec_schedule.c:1740:3: note: in expansion of macro ‘for_each_physical_engine’ for_each_physical_engine(i915, engine) { ^~~~~~~~~~~~~~~~~~~~~~~~ ../lib/igt_gt.h:84:44: note: shadowed declaration is here for (const struct intel_execution_engine *e__ = intel_execution_engines;\ ^~~ ../tests/i915/gem_exec_schedule.c:1719:2: note: in expansion of macro ‘for_each_physical_engine’ for_each_physical_engine(i915, signaler) { ^~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Andi Shyti <andi.shyti@intel.com>
2019-09-19Force spin-batch to cause a hang as requiredChris Wilson
When using a spinner to trigger a hang, make it unpreemptable so that it appears like a true hang. References: https://bugs.freedesktop.org/show_bug.cgi?id=109661 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Andi Shyti <andi.shyti@intel.com>
2019-08-12gem_exec_fence: Really loop through all enginesPetri Latvala
Continue instead of breaking on the first engine. Signed-off-by: Petri Latvala <petri.latvala@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-05-23i915/gem_exec_fence: Replace open-coded recursive batch with igt_spin_tChris Wilson
The only detail of note here was that we were creating a fence from the recursive batch, now supported by igt_spin_t (thanks Tvrtko). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com>