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In few tests we got some MI_* duplicates (MI_MATH for example).
Add common definitions in intel_reg.h and remove local definitions
in the tests.
v2: Definitions MI_LOAD_REGISTER_MEM_GEN8 was removed so from now
on user will need to encode length on it own. :
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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On discrete the object should already be using I915_CACHING_CACHED, by
default, for system memory objects, although we can no longer explicitly
control the PTE caching bits.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/4873
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Nirmoy Das <nirmoy.das@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@linux.intel.com>
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For newer gens we're not able to rely on relocations. Adopt to use
offsets acquired from the allocator.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Add a wrapper for gem_create_ext ioctl (a version of gem_create that
accepts extensions). In preparation for the driver change implementing it,
a local definition of its id and necessary structs have been added,
which are to be erased as soon as those definitions
appear in the i915_drm.h file.
The new ioctl wrapper is added to a separate file.
For consistency the wrapper of the old ioctl, gem_create
is moved from ioctl_wrappers to gem_create.
Signed-off-by: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Chris P Wilson <chris.p.wilson@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Avoid hard coding the expected PCI location, and refer to the pci device
used for the test device instead.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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igt_require_gem() is a pecularity of i915/, move it out of the core.
Similar opportunistic move of gem_reopen_driver() and
gem_quiescent_gpu().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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We fix up a failed SRM by performing an mmio writing into the results
buffer, so it is not strictly a readonly buffer for such failures.
If it were not for the suspend coverage, we could simply get rid of this
duplicate testing.
Fixes: 4b9889882ef6 ("i915/gem_workarounds: Mix and match SRM with mmio reads")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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On TGL till B0 stepping FF_MODE2(0x6604) register is not readable. But
we need to program this register for Wa_1604555607 for better
performance. Hence to skip the verification attempt on this register
through read, we are marking this register as write only.
As of now I have marked this register as write only for gen12, we can
narrow it down to TGL <= B0, if we can retrieve the stepping of the
platform at IGT.
v2:
comma is added [Chris]
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
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Library was limited for reading registers for only
one device at a time in igt tests.
Changes in this patch give as oportunity to test multiple devices in
the same time.
v8: pack and rename structure, remove unnecessary field
v7: remove unnecessary code
v6: Reword patch. Cosmetic changes.
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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To reduce the assumptions of RCS0 in the kernel, we want to make the
debugfs engine agnostic and so we need to adapt the igt parser for
flexibility.
If we could just adequately simulate S3/S4 in the kernel we could forgo
this test entirely...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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On apl, mmio reads fail, reading 0.
On cml, SRM reads fail, reading 0.
Combine both approaches, starting with SRM and fixing in the blanks with
mmio reads.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
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It seems like the HW validator is getting better at preventing our
snooping of system registers from non-privileged batches! If we can't
use SRM, let's probe the register directly through mmio, making sure we
have the context spinning on the GPU first.
v2: Hold forcewake just in case the spinning batch isn't enough to
justify our register access.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110544
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Check that we are allowed to reset the GPU prior to execution.
v2: Push the require checking up into a subgroup
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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We can already move all the tests with distinct prefixes: gem_, gen3_
and i915_.
pm_ and drv_ tests will follow in batches, so we can do the
adjustments in the reporting/filtering layer of the CI system.
v2: Fix test-list.txt generation with meson
v3: Fix docs build (Petri)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Tested-by: Petri Latvala <petri.latvala@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
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