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General update to reflect current state of things.
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Acked-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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We don't expect every machine to be able to pass the WC/GTT coherency
check, see
kernel commit 3b5724d702ef24ee41ca008a1fab1cf94f3d31b5
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu Aug 18 17:16:49 2016 +0100
drm/i915: Wait for writes through the GTT to land before reading back
If we quickly switch from writing through the GTT to a read of the
physical page directly with the CPU (e.g. performing relocations through
the GTT and then running the command parser), we can observe that the
writes are not visible to the CPU. It is not a coherency problem, as
extensive investigations with clflush have demonstrated, but a mere
timing issue - we have to wait for the GTT to complete it's write before
we start our read from the CPU.
The issue can be illustrated in userspace with:
gtt = gem_mmap__gtt(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
cpu = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
for (i = 0; i < OBJECT_SIZE / 64; i++) {
int x = 16*i + (i%16);
gtt[x] = i;
clflush(&cpu[x], sizeof(cpu[x]));
assert(cpu[x] == i);
}
Experimenting with that shows that this behaviour is indeed limited to
recent Atom-class hardware.
so split out the interleave coherency check from the basic
interopability check.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102577
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
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This reverts commit d7a0b61450797a3d6644c65aebf75c2a90da1a15.
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Default is not an engine but an ABI alias for RCS. Remove it
from the engine list to eliminate redundant subtests and test
passes.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@intel.com>
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Rather than have the code in multiple locations, put a copy in lib/
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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commit 4337091f6af6 moved the initialisation of the pollfd into the
child, forgetting that it was also used in the parent as a sanity check.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97885
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Avoid having both the child and parent do the same "did the flip"
happen check with each looking for the same event on the same fd. The
problem being that the child may fall asleep and by the time it wakes up
to do its check, the parent has already eaten the event. So leave the
checking that the flip does occur to the parent.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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On the move to doing front/back flips, I managed to completely break the
test by forgetting to pass the fence to be signaled.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Check that we neither stall nor flip too early given active front/back
buffers.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Identify whether it is the nonblockling page-flip request that blocks or
the event is fired too early.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This reverts commit 5188745c4b531d09508cf0897fb90a3634299283.
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The following tests are causing problems in CI:
prime_vgem@basic-fence-flip, fails intermittently on a HSW and SKL
prime_vgem@basic-fence-wait-default, fails on all platforms since it
was added
prime_vgem@basic-sync-default, fails on all platforms since it was
added, and it sometimes hangs BYT machine
prime_vgem@basic-busy-default, fails on all platforms since it was
added
prime_vgem@basic-wait-default, fails on all platforms since it was
added, and it sometimes hangs BYT machine
Add a flag to enable them when they get stable enough.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Wait until the child tells us they are running (and have verified the
initial buffer state) before modifing the vgem buffer and then signaling
the child.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Ensure that the child does need to sleep before the vgem is written.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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To protect the kernel against unscrupulous fence users, fences should
automatically signal after a timeout.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Close the batch before asserting so that we don't have to wait for a
hang after a failure.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Since we use distinct WC addresses for the same page, we need to flush
the WCB after the write in order to see it from the other mmaping.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Primarily to check that we have the WC read/write disparity.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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