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In investigating the issue with having to force preemption within the
executing ELSP[], we want to trigger preemption between all elements of
that array. To that end, we issue a series of requests with different
priorities to fill the in-flight ELSP[] and then demand preemption into
the middle of that series. One can think of even more complicated
reordering requirements of ELSP[], trying to switch between every
possible combination of permutations. Rather than check all 2 billion
combinations, be content with a few.
v2: Add a different pattern for queued requests. Not only do we need to
inject a request into the middle of a single context with a queue of
different priority contexts, but we also want a queue of different
contexts, as they have different patterns of ELSP[] behaviour.
v3: Fixup the naming clash from copy'n'pasting
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
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Before we start trying to use userptr to test interoperability with
PRIME, we first need to check that the device in question has userptr
support.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106013
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Depending on the default mode size, some tests will fail because it
will exceed the maximum size that hardware tracking can handle,
mostly because hardware tracking do not take in care the X and Y
offsets, so the plane size + offsets needs be smaller or equal to
hardware tracking limmits.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105680
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Masking assumes a direct relationship between the software LUT
structure, and hardware LUT. This is not always the case.
On AMD hardware for example, the hardware LUT is composed of
piecewise-linear segments, with end-point spaced exponentially along the
X axis, while software LUT is spaced linearly. Masking the LUT for the
purpose of truncating the resulting colors won't work here.
v2: Add commit message and sign off.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Fill entire frame to avoid garbage data from being included in CRC
calculations.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Modesetting requires DRM_MASTER privileges, so use
drm_open_driver_master() to assert that we do acquire them.
References: https://bugs.freedesktop.org/show_bug.cgi?id=105997
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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When running a single subtest, outstanding work might hang after the test
ends therefore escaping detection by the hang_detector.
v2:
- Update commit message. (Chris)
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Realtime scheduling interferes with execlists submission (tasklet) so try
to simplify the PWM loop in a few ways:
* Drop RT.
* Longer batches for smaller systematic error.
* More truthful test duration calculation.
* Less clock queries.
* No self-adjust - instead just report the achieved cycle and let the
parent check against it.
* Report absolute cycle error.
v2:
* Bring back self-adjust. (Chris Wilson)
(But slightly fixed version with no overflow.)
v3:
* Log average and mean calibration for each pass.
v4:
* Eliminate development leftovers.
* Fix variance logging.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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The kms_frontbuffer_tracking@*suspend subtests spend 20 seconds
sleeping around igt_system_suspend_autoresume. I find no other
igt test that require sleeping in relation to suspend-resume, so
it should be removed.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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We don't expect to access those registers on Braswell.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105593
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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get_sink_crc() wants the eDP panel enabled to collect a CRC, but this
is already required for opening the pipe CRC. This was broken in the
conversion to igt_display, because the call to setup_sink_crc was moved.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105503
Reported-by: Marta Löfstedt <marta.lofstedt@intel.com>
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As we reopen the fd for each subtest, and we need a DRM_MASTER, we need
to drop master on the original before we are allowed to claim DRM_MASTER
on the second.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105922
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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gem_context_create() nowadays assumes you have already checked for
context support and asserts for any error. So check first.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105924
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The get_sink_crc function usleep(300000) with motivation:
"Now give a time for human eyes". However, the function has already
exited early on igt_interactive_debug, so no human is waiting.
Also, waiting for keypress is obsolete when not in
igt_interactive_debug mode.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
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There is currently no hardware in our labs that supports
pipe-d, pipe-e nor pipe-f.
Skipping takes time, so all tests on these pipes should be
blacklisted.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Skipping takes time, specifically for the big amount of drrs
related kms_frontbuffer_tracking tests. Since we currently
don't have any system set up with DRRS panels, blacklisting
all those test will save time, and we can avoid the need to
increase the Jenkins timeout in order to solve the Bugzilla
below.
V2: Changed typo and added comment.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105617
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Make sure we gently skip when required features (CCS, getfb2) are not
supported on the running kernel, and clean up properly after ourselves.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Reset and unwedge stress testing is supposed to trigger wedging or resets
at incovenient times and then re-use the context so either the context or
driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.
Workaround that by always creating a dedicated context which will be
running when GPU reset happens.
v2:
* Export and use gem_reopen_device so the test works on old gens as well.
(Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Per Bspec, fb height needs to be min 16 for NV12 (YUV planar
formats). We also need the src height and width to be
multiple of 4.
Reviewed-By: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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We'll want to reuse this, so split it out into a (smaller!) helper.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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The getfb ioctl only supports returning a single buffer handle
(mirroring addfb), which means it should refuse to return us back CCS
buffers.
This is enforced by the kernel as of b24791fe00f8.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Wrong file descriptor was passed to the iterator. This had currently no
effect, since it wasn't used in the macro, but needs to be fixed.
At the same time make the macro consistent by checking for engine presence
like the other iterators do.
Added __for_each_engine_class_instance which does not check for engine
presence and so is useful for enumerating all possible engines - like for
instance for subtest enumeration.
And another 'wrong fd used' fixlet in the render node subtests.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reported-by: Michel Thierry <michel.thierry@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
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subtest, v3.
This is hidden behind the other kms_frontbuffer_tracking failures,
but is its own fail.
On gen9/gen10 we fail the scaledprimary tests because FBC refuses
to be enabled with "plane Y offset is misaligned".
Looking at the kernel, this is a workaround for FIFO underruns
which can be tested as well. Test that with the right alignment, FBC
is enabled and with misalignment FBC is disabled on <= gen10.
Changes since v1:
- Always check both alignments.
Changes since v2:
- Fix gen assignment.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105678
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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If we inject a reset into the target context, there is a risk that the
register state is never saved back to memory. The exact interaction
between reset, the context image and the precise timing of our execution
are not well defined. Since we cannot ensure that the context image
remains valid, force a context switch prior to the reset.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105270
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105457
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105545
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The test is whether with all but one engine busy we record the correct
load on each engine. If we only have one engine, this test degenerates
into all-idle/all-busy, so we can skip to avoid crashing on the
assumption that we have a busy spinner.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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More than one test assumes that the spinner is running pretty much
immediately after we have create or submitted it.
In actuality there is a variable delay, especially on execlists platforms,
between submission and spin batch starting to run on the hardware.
To enable tests which care about this level of timing to account for this,
we add a new spin batch constructor which provides an output field which
can be polled to determine when the batch actually started running.
This is implemented via MI_STOREDW_IMM from the spin batch, writing into
memory mapped page shared with userspace.
Using this facility from perf_pmu, where applicable, should improve very
occasional test fails across the set and platforms.
v2:
Chris Wilson:
* Use caching mapping if available.
* Handle old gens better.
* Use gem_can_store_dword.
* Cache exec obj array in spin_batch_t for easier resubmit.
v3:
* Forgot I915_EXEC_NO_RELOC. (Chris Wilson)
v4:
* Mask out all non-engine flags in gem_can_store_dword.
* Added some debug logging.
v5:
* Fix relocs and batch munmap. (Chris)
* Added assert idle spinner batch looks as expected.
v6:
* Skip accuracy tests when !gem_can_store_dword.
v7:
* Fix batch recursion reloc address.
v8:
Chris Wilson:
* Pull up gem_can_store_dword check before we start submitting.
* Build spinner batch in a way we can skip store dword when not
needed so we can run on SandyBridge.
v9:
* Fix wait on spinner.
* More tweaks to accuracy test.
v10:
* Dropped accuracy subtest changes due problems with RT thread and
tasklet submission.
v11:
* Use READ_ONCE.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # IRC
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If we stop relying on regular GPU hangs to be detected, but trigger them
manually as soon as we know our batch of interest is actually executing
on the GPU, we can dramatically speed up various subtests.
This is enabled by the pollable spin batch added in the previous patch.
v2:
* Test gem_wait after reset/wedge and with reset/wedge after a few
predefined intervals since gem_wait invocation. (Chris Wilson)
v3:
Chris Wilson:
* Decrease short test to 1us.
* Use POSIX timers instead of signals to avoid interrupting gem_wait.
* Improve comment.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Some platforms may execute the heavy workload very slowly, such that
using a batch of 1024 takes tens of seconds and immediately overrunning
the 5s timeout on a pass. Added up over a few dozen passes, this turns a
120 second test into 10 minutes. Counter this by doing a warmup loop to
estimate the appropriate queue len for timing.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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The list of regular expressions for tests that are not to be run in
sharded full test suite rounds, copied from
https://intel-gfx-ci.01.org/blacklist.txt
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Original text was written before shard runs existed. Removed the
criteria for testlist contents; The list is still strictly controlled,
but additions/removals will be considered case-by-case.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Some tests measure the render's ring size but are actually meant to
measure the smallest across all engines. This patch adds measuring the
smallest size in gem_measure_ring_size_inflight() given the appropriate
parameter.
v2:
- Only expose high level API. (Chris)
v3:
- Use ALL_ENGINES macro.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add a new test exercising the GetFB API, specifically including its
behaviour of always returning new handles even if the client already has
a handle to the GEM buffer.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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In interfaces where a parameter allow to select an engine, we usually
use '-1' or '~0u' to select all engines. This patch replaces magic
numbers with a named constant.
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Kernel does not expose the "Active: " flag in edp_psr_status anymore.
So test for "HW Enabled & Active bit: yes", although this isn't completely
accurate either for frontbuffer tests. Let's go with this for now until
the kernel exposes HW PSR status.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105519
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Clean up cursor fb in cleanup_crtc, which means that cursor fb
has to be created after prepare_crtc() is called.
This will fix a small leak when a subtest fails.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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igt_display_require_output_on_pipe.
This test is purely about the pipe fifo underrun, so not all outputs
need to be tested. Reorder the tests to run per pipe first, this will
save a modeset for all different sizes when the tests are run per-binary,
and another modeset on each subtest when more than 1 output is connected.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Put a single igt_display_require_output_on_pipe in the fixture,
so we know we always have an output on the pipe and can always
assume it's not NULL.
Changes since v1:
- Move igt_subtest_group upwards, to prevent a skip when no valid
output can be found on pipe A, but can be found on other pipes.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> #v1
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
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A single output on every pipe will do for testing.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Add the binary hamming weight helper to igt_aux.h.
v2: Add just the one macro that works for 64 and 32 bits (Chris)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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When FBC cannot be enabled in one of the tests, we get a lot of repeated
spam at DEBUG level, which overwrites any good debug level data that you
can hope to get out of the test.
When running at the debug level, output FBC info only if changed from last
time, so we don't get the repeated spam.
This makes the debug info from CI slightly more useful.
Changes since v1:
- Clear last_fbc_buf in fbc_wait_until_enabled.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[mlankhorst: Remove stray from igt_core.c]
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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When the plane scaling is used with YUV 420 planar formats,
the height should be a minimum of 16 scanlines as per BSpec.
Minimum of 8 scanlines is for non-YUV 420 planar formats.
Patch changes the minimum fb height being used in the test
in case of YUV 420 planar (currently done for NV12, as
that is the only planar format supported)
v2: Addressed review comments from Maarten
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Commit 8c6b709d96cb9 ("drm/i915: Use new CRC debugfs API") has been in
the kernel for more than a year.
In commit 6d16875736b9f ("lib/igt_debugfs: Remove support for legacy CRC api.")
we've removed support for the legacy CRC testing and we're about to remove
the last remnants from the kernel, so it's time to remove the last tests for
legacy CRC as well.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> #irc
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Haswell's configuration are a bit different from the following Gens.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105476
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Unfortunately I forgot that some of those tests require rcs topology
support which we don't have on Sandybridge. This change split the test
in 2 (first part available on all platforms, second part only with rcs
topology support).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105475
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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In CI runs we every now and then fail to read correct CRC yielding an error
when comparing reference and grabbed CRC's. Let's first fix the test so that
we drain the pipe first and then read the correct CRC. While at it, let's
simplify the test by combining legacy and atomic tests into a one common
function.
v2: We don't need to drain pipe when we grab first CRC
v3: Nuke legacy commits
References: https://bugs.freedesktop.org/show_bug.cgi?id=103166
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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On most platforms ARGB8888 is only supported by the cursor plane,
which doesn't support tiled buffers. Hence the kernel is under no
obligation to accept the request to create a tiled ARGB888
framebuffer. Apparently we've been letting this slip through so
far, but that is about to change.
Fortunately the resulting fb was neer actually used (in fact the
kernel would have rejected the setplane/atomic ioctl with such
a framebuffer). All we're really interested here is the gem BO
which we feed to the kernel via the setcursor ioctl after changing
the tiling to linear. To avoid changing the test drastically we
can simply change the fb to XRGB8888, which combined with X-tiling
is supported on all platforms.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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