Age | Commit message (Collapse) | Author |
|
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
|
|
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
|
|
and make sure intel_l3_parity.h will be included in tarball.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
|
|
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
|
|
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
We still need to dump some of the known sections explicitly due to
dependencies on information extracted, such as LFP data pointers and
panel_type.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Dump sections through a table based on the section id.
Hex dump the section. This works also for unknown sections.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
|
|
|
We finally received permission to release this; the counters should be
properly documented in the Haswell PRMs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
|
|
It's not customary to display the VIC in hexadecimal and lead me to
scratch my head for a couple of seconds. Print it in decimal instead.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
v2: Add a comment explaining the dangers of directly accessing the DFT
register (Daniel)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Haswell added the ability to inject errors which is extremely useful for
testing. Add two arguments to the tool to inject, and uninject.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Haswell GT3 adds a new slice which is kept distinct from the old
register interface. Plumb it into the code, though it's only 1 slice
still.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Add a new command line argument to the tool which will spit out various
parameters for the giving hardware. As a result of this, some new
defines are added to help with the various info.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Add new command line arguments in addition to supporting the old
features. This patch only introduces one feature, the -e argument to
enable a specific row/bank/subbank. Previously you could only enable
all. Otherwise, it has what you expect (we prefer -r -b -s for
specifying the row/bank/subbank).
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
v2: Don't assert for Valleyview (Bryan)
Rework code to be a bit more readable.
CC: "Bell, Bryan J" <bryan.j.bell@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
For Haswell, some audio configuration registers have changed their name and
some bit definitions.
This patch applies the changes, and uses subfunctions to parse registers for
code reuse.
Here is the name change list:
Audio configuration: AUD_CONFIG_x to AUD_TCx_CONFIG
Audio Misc Control: AUD_MISC_CTRL_x to AUD_Cn_MISC_CTRL
Audio M & CTS programming enable: AUD_CTS_ENABLE_x to AUD_TCx_M_CTS_ENABLE
Audio EDID data block: AUD_HDMIW_HDMIEDID_x to AUD_TCx_EDID_DATA
Audio Widget Data Island Packet: AUD_HDMIW_INFOFR_x to AUD_TCx_AUD_INFOFR
Audio Pipe and Converter Configs: AUD_PORT_EN_HD_CFG to AUD_PIPE_CONV_CFG
Audio Digital Converter: AUD_OUT_DIG_CNVT_x to AUD_Cn_DIG_CNVT
Audio Stream Descriptor Format: AUD_OUT_STR_DESC_x to AUD_Cn_STR_DESC
Audio Connect List Entry & Length: AUD_PINW_CONNLNG_LIST_x to
AUD_TCx_PIN_PIPE_CONN_ENTRY_LNGTH
Audio Connection Select Control: AUD_PINW_CONNLNG_SEL to AUD_PIPE_CONN_SEL_CTRL
Audio DIP & ELD Control State: AUD_DIP_ELD_CTRL_ST_x to AUD_TCx_DIP_ELD_CTRL_ST
Audio HDMI FIFO status: AUD_HDMIW_STATUS to AUD_HDMI_FIFO_STATUS
NOTE:
For Tx, x = A/B/C, meaning Transcoder A/B/C.
For Cn, n = 1/2/3, meaning audio converter 1/2/3.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
|
|
This patch makes the file to follow kernel coding style:
- replace leading spaces with tabs for alignment
- fix some minor format issues
But the max length of a line is set to 120 characters for readability
on high resolution displays.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
|
|
The PCH transcoder config register (PCH_TRANS_CONF, 0xf0008) is not the
correct config register for transcoder A, B or C. This register is in
PCH and for CRT display, nothing to do with display audio.
So This patch removes misuse of it as config register for transcoder A/B/C.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Haihao Xiang <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
|
|
./tools/intel_gtt -d | head
GTT offset | PTEs
--------------------------------------------------------
0x000000 | 0xe4005015 0xe2854015 0xe283e015 0xe283f015
0x004000 | 0xe28ba015 0xe28bb015 0xe28b6015 0xe28b7015
0x008000 | 0xe2828015 0xe2829015 0xe282a015 0xe282b015
0x00c000 | 0xe2928015 0xe2929015 0xe292a015 0xe292b015
0x010000 | 0xe2918015 0xe2919015 0xe291a015 0xe291b015
0x014000 | 0xe291c015 0xe291d015 0xe291e015 0xe291f015
0x018000 | 0xe2920015 0xe2921015 0xe2922015 0xe2923015
0x01c000 | 0xe2924015 0xe2925015 0xe2926015 0xe2927015
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
This finishes the objective in the last patch which was to actually deal
with physical addresses, and not the PTEs.
GEN6+ Provided support for physical addresses above 4GB. I'm not
actually sure what Ironlake supported, and don't feel like firing up the
timemachine.
v2: Add support for gen4, gen5, and haswell.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
The GTT PTEs that the tool is trying to compare is really about
addresses, and not the PTE itself. To accomplish this, make which
calculates the physical address we actually want.
This commit itself doesn't change any functionality; just the wording in
the code.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
GCC 4.8.1 seems to think clock may be uninitialized.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
As Ville noted, future 3D_Struct must also send 3D_Ext_Data in the
vendor infoframe.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
This patch is to avoid the error on device auto-detection failure
"TypeError: Can't convert 'int' object to str implicitly".
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
|
|
It's unused. Also most of our tests failed to ask for the right type
of drm fd anyway. So it's imo better to just let them fall over when
they don't get master but want it, like they already do today.
This also allows us to garbage-collect the master parameter to
drm_get_card and associated code.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
This was missed beforehand.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
|
|
The HDMI vendor infoframe can contain a HDMI VIC (as of HDMI 1.4, only
used for 4k formats).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
|
|
A simple utility to capture the currently active framebuffers and record
them as a png.
|
|
As the sysfs is almost always mounted and readable, we have a higher
success rate checking for our error state there than in debugfs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
|
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
I'm full of fail ...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
The intel_reg_dumper tool reads a lot of display registers. If we
don't turn on the power well, dmesg will get flooded with tons of
messages about unclaimed registers. So here we enable the "Debug"
power well register and then restore its state later. It's impossible
to guarantee that other things won't mess with the debug register
between our put and get calls, but at least we're trying our best to
keep things working fine, and it's the debug register anyway.
As far as I know, nothing else uses the Debug register for anything,
so we should be safe for now.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
|
|
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
|
|
Add the names of all VLV DPIO registers.
v2: Use the third element to signal DPIO registers, and split
the code changes to a separate patch
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Add a small comment about what the elements in the register
tuple mean.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Repurpose the (currently unused) third element in the register
definition tuple to indicate the type of the register. 'DPIO'
is the only special register type for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|