From b96bf5a0307fc0bdbf6c8e86872817306e102883 Mon Sep 17 00:00:00 2001 From: Nirmoy Das Date: Fri, 10 Jun 2022 12:54:57 +0200 Subject: i915/gem_exec_balancer: fix parallel_ordering with no-reloc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure to allocate ahnd so that spinner starts with no-reloc execbuf otherwise this will fail on platforms with relocation disabled. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6117 Reviewed-by: Zbigniew Kempczyński Signed-off-by: Nirmoy Das Signed-off-by: Ramalingam C --- tests/i915/gem_exec_balancer.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c index 186975c4..6e6bf470 100644 --- a/tests/i915/gem_exec_balancer.c +++ b/tests/i915/gem_exec_balancer.c @@ -3108,6 +3108,7 @@ static void parallel_ordering(int i915, unsigned int flags) unsigned int count; int i = 0, fence = 0; uint32_t batch[16]; + uint64_t ahnd; struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_exec_object2 obj[32]; igt_spin_t *spin; @@ -3162,7 +3163,9 @@ static void parallel_ordering(int i915, unsigned int flags) /* Block parallel submission */ spin_ctx = ctx_create_engines(i915, siblings, count); + ahnd = get_simple_ahnd(i915, spin_ctx->id); spin = __igt_spin_new(i915, + .ahnd = ahnd, .ctx = spin_ctx, .engine = 0, .flags = IGT_SPIN_FENCE_OUT | @@ -3204,6 +3207,7 @@ static void parallel_ordering(int i915, unsigned int flags) gem_close(i915, obj[i].handle); free(siblings); igt_spin_free(i915, spin); + put_ahnd(ahnd); } } -- cgit v1.2.3