From f506fd512eaff6fab8846c01c918cca450ddc8ef Mon Sep 17 00:00:00 2001 From: Lukasz Kalamarz Date: Fri, 25 May 2018 09:15:33 +0200 Subject: lib: Rename all surfaceformat calls in libs This patch is renaming all surfaceformat registers to use names introduced in surfaceformat.h instead of using per gen definitions v2: Drop GEN_ from register names. Applied that to other libs. Signed-off-by: Lukasz Kalamarz Reviewed-by: Katarzyna Dec Cc: Radoslaw Szwichtenberg Cc: Daniele Ceraolo Spurio --- lib/gpu_cmds.c | 8 ++++---- lib/rendercopy_gen6.c | 16 ++++++++-------- lib/rendercopy_gen7.c | 14 +++++++------- lib/rendercopy_gen8.c | 12 ++++++------ lib/rendercopy_gen9.c | 12 ++++++------ tools/null_state_gen/intel_renderstate_gen6.c | 8 ++++---- tools/null_state_gen/intel_renderstate_gen7.c | 8 ++++---- 7 files changed, 39 insertions(+), 39 deletions(-) diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c index d02877f4..323b03f6 100644 --- a/lib/gpu_cmds.c +++ b/lib/gpu_cmds.c @@ -72,7 +72,7 @@ gen7_fill_surface_state(struct intel_batchbuffer *batch, ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64); offset = intel_batchbuffer_subdata_offset(batch, ss); - ss->ss0.surface_type = GEN7_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; @@ -111,10 +111,10 @@ gen7_fill_binding_table(struct intel_batchbuffer *batch, offset = intel_batchbuffer_subdata_offset(batch, binding_table); if (IS_GEN7(batch->devid)) binding_table[0] = gen7_fill_surface_state(batch, dst, - GEN7_SURFACEFORMAT_R8_UNORM, 1); + SURFACEFORMAT_R8_UNORM, 1); else binding_table[0] = gen8_fill_surface_state(batch, dst, - GEN8_SURFACEFORMAT_R8_UNORM, 1); + SURFACEFORMAT_R8_UNORM, 1); return offset; } @@ -353,7 +353,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch, ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 64); offset = intel_batchbuffer_subdata_offset(batch, ss); - ss->ss0.surface_type = GEN8_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c index 38f8ab26..031d864b 100644 --- a/lib/rendercopy_gen6.c +++ b/lib/rendercopy_gen6.c @@ -87,10 +87,10 @@ gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, } ss = intel_batchbuffer_subdata_alloc(batch, sizeof(*ss), 32); - ss->ss0.surface_type = GEN6_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; - ss->ss0.data_return_format = GEN6_SURFACERETURNFORMAT_FLOAT32; + ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32; ss->ss0.color_blend = 1; ss->ss1.base_addr = buf->bo->offset; @@ -119,9 +119,9 @@ gen6_bind_surfaces(struct intel_batchbuffer *batch, binding_table = intel_batchbuffer_subdata_alloc(batch, 32, 32); binding_table[0] = - gen6_bind_buf(batch, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); + gen6_bind_buf(batch, dst, SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = - gen6_bind_buf(batch, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); + gen6_bind_buf(batch, src, SURFACEFORMAT_B8G8R8A8_UNORM, 0); return intel_batchbuffer_subdata_offset(batch, binding_table); } @@ -238,7 +238,7 @@ static void gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | + OUT_BATCH(SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); @@ -362,7 +362,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -371,7 +371,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* x,y */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -380,7 +380,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* u0, v0 */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c index 73513279..82e33288 100644 --- a/lib/rendercopy_gen7.c +++ b/lib/rendercopy_gen7.c @@ -75,7 +75,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch, ss = intel_batchbuffer_subdata_alloc(batch, 8 * sizeof(*ss), 32); - ss[0] = (GEN7_SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT | + ss[0] = (SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT | gen7_tiling_bits(buf->tiling) | format << GEN7_SURFACE_FORMAT_SHIFT); ss[1] = buf->bo->offset; @@ -105,7 +105,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) ((2 * (1 + 2)) + 1 - 2)); OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT | @@ -115,7 +115,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) /* x,y */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | @@ -124,7 +124,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) /* s,t */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | @@ -187,9 +187,9 @@ gen7_bind_surfaces(struct intel_batchbuffer *batch, binding_table = intel_batchbuffer_subdata_alloc(batch, 8, 32); binding_table[0] = - gen7_bind_buf(batch, dst, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM, 1); + gen7_bind_buf(batch, dst, SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = - gen7_bind_buf(batch, src, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM, 0); + gen7_bind_buf(batch, src, SURFACEFORMAT_B8G8R8A8_UNORM, 0); return intel_batchbuffer_subdata_offset(batch, binding_table); } @@ -476,7 +476,7 @@ static void gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | + OUT_BATCH(SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); /* disable depth, stencil and hiz */ OUT_BATCH(0); diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c index f1e4e002..b60d18a7 100644 --- a/lib/rendercopy_gen8.c +++ b/lib/rendercopy_gen8.c @@ -164,7 +164,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, offset = intel_batchbuffer_subdata_offset(batch, ss); annotation_add_state(aub, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); - ss->ss0.surface_type = GEN6_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ @@ -208,10 +208,10 @@ gen8_bind_surfaces(struct intel_batchbuffer *batch, binding_table[0] = gen8_bind_buf(batch, aub, - dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); + dst, SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = gen8_bind_buf(batch, aub, - src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); + src, SURFACEFORMAT_B8G8R8A8_UNORM, 0); return offset; } @@ -321,7 +321,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * We don't really know or care what they do. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -335,7 +335,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * for doing this though. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -347,7 +347,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * from the source buffer. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 42b12eb5..ea69b95f 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -163,7 +163,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, annotation_add_state(&aub_annotations, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); - ss->ss0.surface_type = GEN6_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ @@ -206,9 +206,9 @@ gen8_bind_surfaces(struct intel_batchbuffer *batch, offset, 8); binding_table[0] = - gen8_bind_buf(batch, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); + gen8_bind_buf(batch, dst, SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = - gen8_bind_buf(batch, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); + gen8_bind_buf(batch, src, SURFACEFORMAT_B8G8R8A8_UNORM, 0); return offset; } @@ -315,7 +315,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * We don't really know or care what they do. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -329,7 +329,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * for doing this though. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -341,7 +341,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * from the source buffer. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | diff --git a/tools/null_state_gen/intel_renderstate_gen6.c b/tools/null_state_gen/intel_renderstate_gen6.c index 5c1b7f97..13b1e92e 100644 --- a/tools/null_state_gen/intel_renderstate_gen6.c +++ b/tools/null_state_gen/intel_renderstate_gen6.c @@ -190,7 +190,7 @@ static void gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | + OUT_BATCH(SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); @@ -314,7 +314,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -323,7 +323,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* x,y */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -332,7 +332,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* u0, v0 */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | diff --git a/tools/null_state_gen/intel_renderstate_gen7.c b/tools/null_state_gen/intel_renderstate_gen7.c index df20bc25..ea5cfc29 100644 --- a/tools/null_state_gen/intel_renderstate_gen7.c +++ b/tools/null_state_gen/intel_renderstate_gen7.c @@ -53,7 +53,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) ((2 * (1 + 2)) + 1 - 2)); OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << + SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); @@ -64,7 +64,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) /* x,y */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | @@ -73,7 +73,7 @@ gen7_emit_vertex_elements(struct intel_batchbuffer *batch) /* s,t */ OUT_BATCH(0 << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | - GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 4 << GEN7_VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | @@ -401,7 +401,7 @@ static void gen7_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | + OUT_BATCH(SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); /* disable depth, stencil and hiz */ -- cgit v1.2.3