From 8dc95202c8c241c50f2e17d3734fc6cb004c076e Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Thu, 23 Jan 2014 13:26:12 +0800
Subject: assembler/skl: update the extdesc field for SEND instruction

The send instruction on gen9 uses the 32bit immediate instead of 6bit immediate
for the extended message descriptors. And some bits of SEND instruction are defined
as the extdesc field.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 assembler/brw_defines.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'assembler/brw_defines.h')

diff --git a/assembler/brw_defines.h b/assembler/brw_defines.h
index 6ca3e171..24e5e303 100644
--- a/assembler/brw_defines.h
+++ b/assembler/brw_defines.h
@@ -1647,4 +1647,6 @@ enum brw_wm_barycentric_interp_mode {
 #define EX_DESC_SFID_MASK 0xF
 #define EX_DESC_EOT_MASK  0x20
 
+#define EX_DESC_FUNC_MASK 0xFFFFFFC0
+
 #endif
-- 
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