From a9387971acf45d1215fdd8af00285b92468f249b Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 5 Dec 2017 16:43:01 +0000 Subject: include/drm-uapi: bump headers Taken from drm-next : commit 9c606cd4117a3c45e04a6616b1a0dbeb18eeee62 Merge: c5dd52f653fa 3997eea57caf Author: Dave Airlie Date: Thu Dec 7 06:28:22 2017 +1000 Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next Signed-off-by: Lionel Landwerlin Reviewed-by: Chris Wilson --- include/drm-uapi/amdgpu_drm.h | 12 ++++++++++++ include/drm-uapi/armada_drm.h | 1 + include/drm-uapi/etnaviv_drm.h | 1 + include/drm-uapi/exynos_drm.h | 1 + include/drm-uapi/i810_drm.h | 1 + include/drm-uapi/i915_drm.h | 38 ++++++++++++++++++++++++++++++++++++++ include/drm-uapi/omap_drm.h | 1 + 7 files changed, 55 insertions(+) (limited to 'include') diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h index 919248fb..4d21191a 100644 --- a/include/drm-uapi/amdgpu_drm.h +++ b/include/drm-uapi/amdgpu_drm.h @@ -160,6 +160,7 @@ union drm_amdgpu_bo_list { #define AMDGPU_CTX_OP_ALLOC_CTX 1 #define AMDGPU_CTX_OP_FREE_CTX 2 #define AMDGPU_CTX_OP_QUERY_STATE 3 +#define AMDGPU_CTX_OP_QUERY_STATE2 4 /* GPU reset status */ #define AMDGPU_CTX_NO_RESET 0 @@ -170,6 +171,13 @@ union drm_amdgpu_bo_list { /* unknown cause */ #define AMDGPU_CTX_UNKNOWN_RESET 3 +/* indicate gpu reset occured after ctx created */ +#define AMDGPU_CTX_QUERY2_FLAGS_RESET (1<<0) +/* indicate vram lost occured after ctx created */ +#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1) +/* indicate some job from this context once cause gpu hang */ +#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1<<2) + /* Context priority level */ #define AMDGPU_CTX_PRIORITY_UNSET -2048 #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023 @@ -869,6 +877,10 @@ struct drm_amdgpu_info_device { __u32 _pad1; /* always on cu bitmap */ __u32 cu_ao_bitmap[4][4]; + /** Starting high virtual address for UMDs. */ + __u64 high_va_offset; + /** The maximum high virtual address */ + __u64 high_va_max; }; struct drm_amdgpu_info_hw_ip { diff --git a/include/drm-uapi/armada_drm.h b/include/drm-uapi/armada_drm.h index 0cb93241..af1c14c8 100644 --- a/include/drm-uapi/armada_drm.h +++ b/include/drm-uapi/armada_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012 Russell King * With inspiration from the i915 driver diff --git a/include/drm-uapi/etnaviv_drm.h b/include/drm-uapi/etnaviv_drm.h index 110cc73b..e9b997a0 100644 --- a/include/drm-uapi/etnaviv_drm.h +++ b/include/drm-uapi/etnaviv_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2015 Etnaviv Project * diff --git a/include/drm-uapi/exynos_drm.h b/include/drm-uapi/exynos_drm.h index 2a064d2b..76c34dd5 100644 --- a/include/drm-uapi/exynos_drm.h +++ b/include/drm-uapi/exynos_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* exynos_drm.h * * Copyright (c) 2011 Samsung Electronics Co., Ltd. diff --git a/include/drm-uapi/i810_drm.h b/include/drm-uapi/i810_drm.h index 6e6cf86b..d285d5e7 100644 --- a/include/drm-uapi/i810_drm.h +++ b/include/drm-uapi/i810_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _I810_DRM_H_ #define _I810_DRM_H_ diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h index 890df227..7f28eea4 100644 --- a/include/drm-uapi/i915_drm.h +++ b/include/drm-uapi/i915_drm.h @@ -86,6 +86,22 @@ enum i915_mocs_table_index { I915_MOCS_CACHED, }; +/* + * Different engines serve different roles, and there may be more than one + * engine serving each role. enum drm_i915_gem_engine_class provides a + * classification of the role of the engine, which may be used when requesting + * operations to be performed on a certain subset of engines, or for providing + * information about that group. + */ +enum drm_i915_gem_engine_class { + I915_ENGINE_CLASS_RENDER = 0, + I915_ENGINE_CLASS_COPY = 1, + I915_ENGINE_CLASS_VIDEO = 2, + I915_ENGINE_CLASS_VIDEO_ENHANCE = 3, + + I915_ENGINE_CLASS_INVALID = -1 +}; + /* Each region is a minimum of 16k, and there are at most 255 of them. */ #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use @@ -450,6 +466,27 @@ typedef struct drm_i915_irq_wait { */ #define I915_PARAM_HAS_EXEC_FENCE_ARRAY 49 +/* + * Query whether every context (both per-file default and user created) is + * isolated (insofar as HW supports). If this parameter is not true, then + * freshly created contexts may inherit values from an existing context, + * rather than default HW values. If true, it also ensures (insofar as HW + * supports) that all state set by this context will not leak to any other + * context. + * + * As not every engine across every gen support contexts, the returned + * value reports the support of context isolation for individual engines by + * returning a bitmask of each engine class set to true if that class supports + * isolation. + */ +#define I915_PARAM_HAS_CONTEXT_ISOLATION 50 + +/* Frequency of the command streamer timestamps given by the *_TIMESTAMP + * registers. This used to be fixed per platform but from CNL onwards, this + * might vary depending on the parts. + */ +#define I915_PARAM_CS_TIMESTAMP_FREQUENCY 51 + typedef struct drm_i915_getparam { __s32 param; /* @@ -839,6 +876,7 @@ struct drm_i915_gem_exec_fence { #define I915_EXEC_FENCE_WAIT (1<<0) #define I915_EXEC_FENCE_SIGNAL (1<<1) +#define __I915_EXEC_FENCE_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_SIGNAL << 1)) __u32 flags; }; diff --git a/include/drm-uapi/omap_drm.h b/include/drm-uapi/omap_drm.h index fd5e3ea5..1fccffef 100644 --- a/include/drm-uapi/omap_drm.h +++ b/include/drm-uapi/omap_drm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * include/uapi/drm/omap_drm.h * -- cgit v1.2.3