From 834321a5d76a16783000441a02d7e79e72be9cc9 Mon Sep 17 00:00:00 2001 From: Mika Kahola Date: Thu, 7 Dec 2017 14:36:34 +0200 Subject: tools: Cannonlake port clock programming Cannonlake port clock programming tests and verifies DPLL legal dividers P, Q, and K. This tests adds two reference clocks 19.2MHz and 24MHz to test algorithm's capability to find P, Q, and K dividers as well as DCO frequency for different symbol clock rates. The test compares two algorithms, the reference with double precision and i915 implementation with fixed point precision. In case of a difference in computation the difference on dividers is printed out to the screen. Signed-off-by: Mika Kahola Acked-by: Rodrigo Vivi Signed-off-by: Rodrigo Vivi --- tools/Makefile.sources | 1 + 1 file changed, 1 insertion(+) (limited to 'tools/Makefile.sources') diff --git a/tools/Makefile.sources b/tools/Makefile.sources index c49ab8f0..abd23a0f 100644 --- a/tools/Makefile.sources +++ b/tools/Makefile.sources @@ -2,6 +2,7 @@ noinst_PROGRAMS = \ hsw_compute_wrpll \ skl_compute_wrpll \ skl_ddb_allocation \ + cnl_compute_wrpll \ $(NULL) tools_prog_lists = \ -- cgit v1.2.3