From afdaeabbcfd9a2fd1b27b8742681d52d12161dd0 Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Thu, 25 Jun 2015 12:21:27 +0100 Subject: skl_compute_wrpll: Cycle through dividers, then central freqs Follow Paulo's comment on the corresponding kernel patch. This means we also have to move the break when we have cycled through the even dividers as well. This improves the number of even dividers used across the tested frequencies (373) (at the expense of a slightly worse average deviation, but "even dividers take precedence over a lower deviation". before: even/odd dividers: 338/35 average deviation: 206.52 after: even/odd dividers: 363/10 average deviation: 215.13 Signed-off-by: Damien Lespiau --- tools/skl_compute_wrpll.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'tools/skl_compute_wrpll.c') diff --git a/tools/skl_compute_wrpll.c b/tools/skl_compute_wrpll.c index be4fc26d..3a2d029d 100644 --- a/tools/skl_compute_wrpll.c +++ b/tools/skl_compute_wrpll.c @@ -422,8 +422,8 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */, skl_wrpll_context_init(&ctx); - for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) { - for (d = 0; d < ARRAY_SIZE(dividers); d++) { + for (d = 0; d < ARRAY_SIZE(dividers); d++) { + for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) { for (i = 0; i < dividers[d].n_dividers; i++) { unsigned int p = dividers[d].list[i]; uint64_t dco_freq = p * afe_clock; @@ -433,14 +433,14 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */, dco_freq, p); } - - /* - * If a solution is found with an even divider, prefer - * this one. - */ - if (d == 0 && ctx.p) - break; } + + /* + * If a solution is found with an even divider, prefer + * this one. + */ + if (d == 0 && ctx.p) + break; } if (!ctx.p) -- cgit v1.2.3