From cb57cdc6327f100ade8d205f6bd2da05cf78c3a4 Mon Sep 17 00:00:00 2001 From: Damien Lespiau Date: Thu, 7 May 2015 18:17:32 +0100 Subject: skl_compute_wrpll: Prefer even dividers Signed-off-by: Damien Lespiau --- tools/skl_compute_wrpll.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'tools/skl_compute_wrpll.c') diff --git a/tools/skl_compute_wrpll.c b/tools/skl_compute_wrpll.c index a3a6e587..55f2df4c 100644 --- a/tools/skl_compute_wrpll.c +++ b/tools/skl_compute_wrpll.c @@ -431,6 +431,13 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */, dco_freq, p); } + + /* + * If a solution is found with an even divider, prefer + * this one. + */ + if (d == 0 && ctx.p) + break; } } -- cgit v1.2.3