diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2021-11-16 20:13:57 +0100 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@linux.intel.com> | 2022-01-06 13:50:13 +0200 |
| commit | cd3746336e0c589749b35c14bff74461ab50ac99 (patch) | |
| tree | aa39c9bd8d3e8270b6210742246b527e3d093619 | |
| parent | a5b42292d07cc27b42cb7c31a155715465c18611 (diff) | |
drm/i915/xehpsdv: add device info
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 37 |
1 files changed, 32 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 8261b6455747..6a7904282b6b 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -28,6 +28,7 @@ #include "i915_driver.h" #include "i915_drv.h" #include "i915_pci.h" +#include "gt/intel_gt.h" #define PLATFORM(x) .platform = (x) #define GEN(x) \ @@ -1020,6 +1021,34 @@ static const struct intel_device_info adl_p_info = { .media.ver = 12, \ .media.rel = 50 +#define XE_HP_SDV_ENGINES \ + BIT(BCS0) | \ + BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) | \ + BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3) | \ + BIT(VCS4) | BIT(VCS5) | BIT(VCS6) | BIT(VCS7) + +static const struct intel_gt_definition xehp_sdv_gts[] = { + { + .type = GT_TILE, + .name = "Remote Tile GT", + .mapping_base = SZ_16M, + .engine_mask = XE_HP_SDV_ENGINES, + }, + { + .type = GT_TILE, + .name = "Remote Tile GT", + .mapping_base = SZ_16M * 2, + .engine_mask = XE_HP_SDV_ENGINES, + }, + { + .type = GT_TILE, + .name = "Remote Tile GT", + .mapping_base = SZ_16M * 3, + .engine_mask = XE_HP_SDV_ENGINES, + }, + {} +}; + __maybe_unused static const struct intel_device_info xehpsdv_info = { XE_HP_FEATURES, @@ -1028,11 +1057,9 @@ static const struct intel_device_info xehpsdv_info = { PLATFORM(INTEL_XEHPSDV), .display = { }, .has_64k_pages = 1, - .platform_engine_mask = - BIT(RCS0) | BIT(BCS0) | - BIT(VECS0) | BIT(VECS1) | BIT(VECS2) | BIT(VECS3) | - BIT(VCS0) | BIT(VCS1) | BIT(VCS2) | BIT(VCS3) | - BIT(VCS4) | BIT(VCS5) | BIT(VCS6) | BIT(VCS7), + .extra_gt = xehp_sdv_gts, + .has_remote_tiles = 1, + .platform_engine_mask = XE_HP_SDV_ENGINES, .require_force_probe = 1, }; |