diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2016-10-19 13:23:30 +0200 |
|---|---|---|
| committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:53:56 +0900 |
| commit | 93cf4e77fbedb50de87969c96d561856fd550fb9 (patch) | |
| tree | 1873e17a2afb3f975ce9528f7f050eef410017eb | |
| parent | 7cc1881dadce42c44c5d656a90c303e72dd69139 (diff) | |
drm/bridge/sii8620: fix reset line logic
Reset line is active in low state, previous configuration was incorrect,
but it worked because logic was also inverted in the driver.
The patch fixes it. To keep bisectability both changes are put into one patch.
The patch adjusts also delays.
Change-Id: I07d08f763fa5ed4805eb638c1d2bb1ddd3328680
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 3 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/bridge/sii8620.c | 13 |
3 files changed, 9 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index e4b8da5194a1..e1160540031b 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "exynos5433.dtsi" +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> / { @@ -1656,7 +1657,7 @@ iovcc18-supply = <&ldo34_reg>; interrupt-parent = <&gpf0>; interrupts = <2 0>; - reset-gpio = <&gpv7 0 0>; + reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; clocks = <&pmu_system_controller 0>; clock-names = "xtal"; assigned-clocks = <&pmu_system_controller 0>; diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts index 421e977fb3ed..7ba5c720cf8d 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "exynos5433.dtsi" +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> / { @@ -1642,7 +1643,7 @@ iovcc18-supply = <&ldo34_reg>; interrupt-parent = <&gpf0>; interrupts = <2 0>; - reset-gpio = <&gpv7 0 0>; + reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; clocks = <&pmu_system_controller 0>; clock-names = "xtal"; assigned-clocks = <&pmu_system_controller 0>; diff --git a/drivers/gpu/drm/bridge/sii8620.c b/drivers/gpu/drm/bridge/sii8620.c index 261589fe5616..f4b30565b855 100644 --- a/drivers/gpu/drm/bridge/sii8620.c +++ b/drivers/gpu/drm/bridge/sii8620.c @@ -620,27 +620,24 @@ static int sii8620_hw_on(struct sii8620 *ctx) if (ret) return ret; - gpiod_set_value(ctx->gpio_reset, 1); - return 0; } static int sii8620_hw_off(struct sii8620 *ctx) { - gpiod_set_value(ctx->gpio_reset, 0); - + gpiod_set_value(ctx->gpio_reset, 1); return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); } static void sii8620_hw_reset(struct sii8620 *ctx) { usleep_range(10000, 20000); - gpiod_set_value(ctx->gpio_reset, 1); - usleep_range(5000, 20000); gpiod_set_value(ctx->gpio_reset, 0); - usleep_range(10000, 20000); + usleep_range(5000, 20000); gpiod_set_value(ctx->gpio_reset, 1); - msleep(30); + usleep_range(10000, 20000); + gpiod_set_value(ctx->gpio_reset, 0); + msleep(300); } static void sii8620_cbus_reset(struct sii8620 *ctx) |