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authorAndrzej Hajda <a.hajda@samsung.com>2016-12-06 13:22:19 +0100
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:54:27 +0900
commit4fbaf7235e0538fc7df943abef2c025b3acad787 (patch)
tree561b4af1e9f919a2a1a248d1f10ccef741db6042
parent9274ccaaaa1d5f5c7b95ea59d742e7e8dde652f4 (diff)
drm/bridge/sii8620: add delay during cbus reset
Without delay CBUS sometimes was not reset properly. Change-Id: I4392297d13c9f9b8551e292fa4e2c070202d7e7f Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
-rw-r--r--drivers/gpu/drm/bridge/sil-sii8620.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
index 43f3d3632a6c..3ba69756816d 100644
--- a/drivers/gpu/drm/bridge/sil-sii8620.c
+++ b/drivers/gpu/drm/bridge/sil-sii8620.c
@@ -888,11 +888,10 @@ static void sii8620_hw_reset(struct sii8620 *ctx)
static void sii8620_cbus_reset(struct sii8620 *ctx)
{
- sii8620_write_seq_static(ctx,
- REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
- | BIT_PWD_SRST_CBUS_RST_SW_EN,
- REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN
- );
+ sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
+ | BIT_PWD_SRST_CBUS_RST_SW_EN);
+ usleep_range(10000, 20000);
+ sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN);
}
static void sii8620_set_auto_zone(struct sii8620 *ctx)