diff options
| author | Andrzej Hajda <a.hajda@samsung.com> | 2016-12-09 10:56:23 +0100 |
|---|---|---|
| committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:54:34 +0900 |
| commit | 529e2563be6f371b31ad0c1742f688359c997d54 (patch) | |
| tree | 399c6e6b880e1862e1efb8b9af8a419df758b83e | |
| parent | e45f55759e7b7058a41a9e9210c20025239eddc3 (diff) | |
drm/bridge/sii8620: enable interlace modes
Bug in DECON(CRTC) driver prevented interlace modes from proper work.
Since DECON is fixed interlace modes can be enabled in MHL.
Change-Id: Ifdebbf921e173a1c10af36d678aa6f8e2921e74a
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
| -rw-r--r-- | drivers/gpu/drm/bridge/sil-sii8620.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index c03ec5ddd1d2..c1950f23fd7a 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -2091,9 +2091,6 @@ static bool sii8620_mode_fixup(struct drm_bridge *bridge, int max_lclk; bool ret = true; - if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) - return false; - mutex_lock(&ctx->lock); max_lclk = ctx->mode < CM_MHL3 ? MHL1_MAX_LCLK : MHL3_MAX_LCLK; |