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authorAndrzej Hajda <a.hajda@samsung.com>2016-10-19 13:23:30 +0200
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:53:56 +0900
commit93cf4e77fbedb50de87969c96d561856fd550fb9 (patch)
tree1873e17a2afb3f975ce9528f7f050eef410017eb /arch
parent7cc1881dadce42c44c5d656a90c303e72dd69139 (diff)
drm/bridge/sii8620: fix reset line logic
Reset line is active in low state, previous configuration was incorrect, but it worked because logic was also inverted in the driver. The patch fixes it. To keep bisectability both changes are put into one patch. The patch adjusts also delays. Change-Id: I07d08f763fa5ed4805eb638c1d2bb1ddd3328680 Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2.dts3
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts3
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index e4b8da5194a1..e1160540031b 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "exynos5433.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
@@ -1656,7 +1657,7 @@
iovcc18-supply = <&ldo34_reg>;
interrupt-parent = <&gpf0>;
interrupts = <2 0>;
- reset-gpio = <&gpv7 0 0>;
+ reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
clocks = <&pmu_system_controller 0>;
clock-names = "xtal";
assigned-clocks = <&pmu_system_controller 0>;
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 421e977fb3ed..7ba5c720cf8d 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -11,6 +11,7 @@
/dts-v1/;
#include "exynos5433.dtsi"
+#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
@@ -1642,7 +1643,7 @@
iovcc18-supply = <&ldo34_reg>;
interrupt-parent = <&gpf0>;
interrupts = <2 0>;
- reset-gpio = <&gpv7 0 0>;
+ reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
clocks = <&pmu_system_controller 0>;
clock-names = "xtal";
assigned-clocks = <&pmu_system_controller 0>;