diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2021-10-03 23:47:25 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-10-03 23:47:25 +0200 |
| commit | 5077a3240bb3a971005afa2f30482283c0984c41 (patch) | |
| tree | 9dca52f066b398f7026624c690e3d39b75d7322c /drivers/pinctrl | |
| parent | 387292c357be13d94bd8c30b62a03badf9e17ae7 (diff) | |
| parent | fcfb63148c241adad54ed99fc318167176d7254b (diff) | |
Merge tag 'renesas-pinctrl-for-v5.16-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v5.16
- Fix duplicate port register on RZ/G2L,
- A minor improvement.
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/core.c | 12 | ||||
| -rw-r--r-- | drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 |
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index f2ab02225837..ef8ef05ba930 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -741,12 +741,12 @@ static int sh_pfc_suspend_init(struct sh_pfc *pfc) { return 0; } #define SH_PFC_MAX_REGS 300 #define SH_PFC_MAX_ENUMS 3000 -static unsigned int sh_pfc_errors __initdata = 0; -static unsigned int sh_pfc_warnings __initdata = 0; -static u32 *sh_pfc_regs __initdata = NULL; -static u32 sh_pfc_num_regs __initdata = 0; -static u16 *sh_pfc_enums __initdata = NULL; -static u32 sh_pfc_num_enums __initdata = 0; +static unsigned int sh_pfc_errors __initdata; +static unsigned int sh_pfc_warnings __initdata; +static u32 *sh_pfc_regs __initdata; +static u32 sh_pfc_num_regs __initdata; +static u16 *sh_pfc_enums __initdata; +static u32 sh_pfc_num_enums __initdata; #define sh_pfc_err(fmt, ...) \ do { \ diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index dbf2f521bb27..20b2af889ca9 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -852,7 +852,7 @@ static const u32 rzg2l_gpio_configs[] = { RZG2L_GPIO_PORT_PACK(2, 0x1e, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x1f, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x20, RZG2L_MPXED_PIN_FUNCS), - RZG2L_GPIO_PORT_PACK(3, 0x22, RZG2L_MPXED_PIN_FUNCS), + RZG2L_GPIO_PORT_PACK(3, 0x21, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x22, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(2, 0x23, RZG2L_MPXED_PIN_FUNCS), RZG2L_GPIO_PORT_PACK(3, 0x24, RZG2L_MPXED_ETH_PIN_FUNCS(PIN_CFG_IOLH_ETH0)), |