diff options
| author | Andy Green <andy.green@linaro.org> | 2011-05-31 09:25:22 +0100 |
|---|---|---|
| committer | Andy Green <andy.green@linaro.org> | 2011-05-31 11:06:54 +0100 |
| commit | 5a1daa94639966a3c0cba2365a2e317908321b0a (patch) | |
| tree | 593620a77b5bb3f13795399c43ae3328dfc41c3d | |
| parent | 764fe5a9f2c019a754f728a2629ad5113e474f31 (diff) | |
SGX adapt physical addresses in cache ops
Signed-off-by: Andy Green <andy.green@linaro.org>
| -rw-r--r-- | drivers/gpu/pvr/osfunc.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/drivers/gpu/pvr/osfunc.c b/drivers/gpu/pvr/osfunc.c index f98e8e08228..e7bfb6d42b1 100644 --- a/drivers/gpu/pvr/osfunc.c +++ b/drivers/gpu/pvr/osfunc.c @@ -2979,12 +2979,22 @@ static void pvr_dmac_clean_range(const void *pvStart, const void *pvEnd) #endif } +static void outer_flush_range_ulong_args(unsigned long a, unsigned long b) +{ + outer_flush_range((phys_addr_t)a, (phys_addr_t)b); +} + IMG_BOOL OSFlushCPUCacheRangeKM(IMG_HANDLE hOSMemHandle, IMG_VOID *pvRangeAddrStart, IMG_UINT32 ui32Length) { return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length, - dmac_flush_range, outer_flush_range); + dmac_flush_range, outer_flush_range_ulong_args); +} + +static void outer_clean_range_ulong_args(unsigned long a, unsigned long b) +{ + outer_clean_range((phys_addr_t)a, (phys_addr_t)b); } IMG_BOOL OSCleanCPUCacheRangeKM(IMG_HANDLE hOSMemHandle, @@ -2992,15 +3002,21 @@ IMG_BOOL OSCleanCPUCacheRangeKM(IMG_HANDLE hOSMemHandle, IMG_UINT32 ui32Length) { return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length, - pvr_dmac_clean_range, outer_clean_range); + pvr_dmac_clean_range, outer_clean_range_ulong_args); } +static void outer_inv_range_ulong_args(unsigned long a, unsigned long b) +{ + outer_inv_range((phys_addr_t)a, (phys_addr_t)b); +} + + IMG_BOOL OSInvalidateCPUCacheRangeKM(IMG_HANDLE hOSMemHandle, IMG_VOID *pvRangeAddrStart, IMG_UINT32 ui32Length) { return CheckExecuteCacheOp(hOSMemHandle, pvRangeAddrStart, ui32Length, - pvr_dmac_inv_range, outer_inv_range); + pvr_dmac_inv_range, outer_inv_range_ulong_args); } #else |