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authorVincent Guittot <vincent.guittot@linaro.org>2011-11-14 09:07:00 +0100
committerVincent Guittot <vincent.guittot@linaro.org>2011-11-14 11:10:06 +0100
commit80fce0df1841a6261d20ca30c9b572c372a64045 (patch)
tree974252eefffe547c3e7ba7523be9074d8b128ad7
parent96881acee427b188f713e8cdfa1e7702ba99477d (diff)
ARM: cpu topology: Modify cpu_power according to sched_mc level
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
-rw-r--r--arch/arm/kernel/topology.c43
1 files changed, 41 insertions, 2 deletions
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 9d80e2254ec..2774c5d6cca 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -19,6 +19,7 @@
#include <linux/nodemask.h>
#include <linux/sched.h>
#include <linux/cpumask.h>
+#include <linux/cpuset.h>
#include <asm/cputype.h>
#include <asm/topology.h>
@@ -61,6 +62,43 @@ static DEFINE_PER_CPU(unsigned int, cpu_scale);
unsigned int advanced_topology = 1;
+static void normal_cpu_topology_mask(void);
+static void (*set_cpu_topology_mask)(void) = normal_cpu_topology_mask;
+
+/* This table sets the cpu_power scale of a cpu according to the sched_mc mode.
+ * The content of this table could be SoC specific so we should add a method to
+ * overwrite this default table.
+ * TODO: Study how to use DT for setting this table
+ */
+#define ARM_CORTEX_A9_DEFAULT_SCALE 0
+#define ARM_CORTEX_A9_POWER_SCALE 1
+/* This table list all possible cpu power configuration */
+unsigned int table_config[2] = {
+ 1024,
+ 4096
+};
+
+static void set_power_scale(unsigned int cpu, unsigned int idx)
+{
+ per_cpu(cpu_scale, cpu) = table_config[idx];
+}
+
+static int init_cpu_power_scale(void)
+{
+ /* Do we need to change default config */
+ advanced_topology = 1;
+
+ /* force topology update */
+ arch_update_cpu_topology();
+
+ /* Force a cpu topology update */
+ rebuild_sched_domains();
+
+ return 0;
+}
+
+core_initcall(init_cpu_power_scale);
+
/*
* Update the cpu power
*/
@@ -129,6 +167,7 @@ static void normal_cpu_topology_mask(void)
for_each_possible_cpu(cpuid) {
default_cpu_topology_mask(cpuid);
+ set_power_scale(cpuid, ARM_CORTEX_A9_DEFAULT_SCALE);
}
smp_wmb();
}
@@ -139,7 +178,6 @@ static void normal_cpu_topology_mask(void)
*/
static void power_cpu_topology_mask_CA9(void)
{
-
unsigned int cpuid, cpu;
for_each_possible_cpu(cpuid) {
@@ -164,6 +202,7 @@ static void power_cpu_topology_mask_CA9(void)
}
}
}
+ set_power_scale(cpuid, ARM_CORTEX_A9_POWER_SCALE);
}
smp_wmb();
}
@@ -278,7 +317,7 @@ int arch_update_cpu_topology(void)
/* set topology policy */
update_cpu_topology_policy();
- /* set topology mask*/
+ /* set topology mask and power */
(*set_cpu_topology_mask)();
return 1;