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authorFredrik Soderstedt <fredrik.soderstedt@stericsson.com>2012-02-21 14:16:51 +0100
committerPhilippe Langlais <philippe.langlais@stericsson.com>2012-05-22 11:02:44 +0200
commit260e6907f1ea2d8c4fb00ef67e8db379056945c1 (patch)
tree09ffe9803953ffe799a109963ff095afe4e31eb1
parentb33de7b939185305696b42d657bee540fb063fe4 (diff)
ARM : ux500: Fix PRCC set and clear register for soft reset
Correct values for PRCC_K_SOFTRST_SET and PRCC_K_SOFTRST_CLR. Fix minor typo for PRCC_K_SOFTRST_SDI0_MASK. ST-Ericsson ID: - Signed-off-by: Fredrik Soderstedt <fredrik.soderstedt@stericsson.com>
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/cpu-db8500.h b/arch/arm/mach-ux500/cpu-db8500.h
index 0aeefec8613..80766f49d60 100644
--- a/arch/arm/mach-ux500/cpu-db8500.h
+++ b/arch/arm/mach-ux500/cpu-db8500.h
@@ -17,7 +17,7 @@
#define PRCC_K_SOFTRST_I2C1_MASK (1 << 2)
#define PRCC_K_SOFTRST_MSP0_MASK (1 << 3)
#define PRCC_K_SOFTRST_MSP1_MASK (1 << 4)
-#define PRCC_K_SOFTRST_SDIO0_MASK (1 << 5)
+#define PRCC_K_SOFTRST_SDI0_MASK (1 << 5)
#define PRCC_K_SOFTRST_I2C2_MASK (1 << 6)
#define PRCC_K_SOFTRST_SP13_MASK (1 << 7)
#define PRCC_K_SOFTRST_SLIMBUS0_MASK (1 << 8)