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authorPeter De Schrijver <pdeschrijver@nvidia.com>2012-05-14 13:27:09 +0300
committerStephen Warren <swarren@nvidia.com>2012-05-14 10:22:01 -0600
commit97e7abc5e04bea6a5db8d54ad34407bb46e85403 (patch)
tree9e828cf6251c9fc3b5dce04439e1645ec8a98405
parent36be50515fe2aef61533b516fa2576a2c7fe7664 (diff)
ARM: tegra: Fix flow controller accesses
flowctrl_write_cpu_csr uses the cpu halt offsets and vice versa. This patch fixes this bug. Reported-by: Dan Willemsen <dwillemsen@nvidia.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [swarren: This problem was introduced in v3.4-rc1, in commit 26fe681 "ARM: tegra: functions to access the flowcontroller", when this file was first added] Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/flowctrl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index fef66a7486e..f07488e0bd3 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
{
- return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
+ return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
}
void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
{
- return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
+ return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
}