diff options
| author | Bob Copeland <me@bobcopeland.com> | 2008-09-28 12:09:43 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2008-09-30 14:07:25 -0400 |
| commit | 14be9947ef9843102b67d315c7483de112b5b2d7 (patch) | |
| tree | 1a9637b0dafdcd63b07226ff9aa6ec6d840901ca | |
| parent | b0dee5784dff3e2984510a7fe7a7e48109001f94 (diff) | |
ath5k: write beacon control register twice when resetting tsf
According to the newly-released Atheros HAL code, asserting the
TSF reset bit will toggle a hardware internal state, resulting in a
spurious reset on the next chip reset. Whenever we force a TSF bit,
write the bit twice to clear the internal signal.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | drivers/net/wireless/ath5k/pcu.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath5k/pcu.c b/drivers/net/wireless/ath5k/pcu.c index c77cee2a558..a47df9a24aa 100644 --- a/drivers/net/wireless/ath5k/pcu.c +++ b/drivers/net/wireless/ath5k/pcu.c @@ -633,8 +633,20 @@ u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah) */ void ath5k_hw_reset_tsf(struct ath5k_hw *ah) { + u32 val; + ATH5K_TRACE(ah->ah_sc); - AR5K_REG_ENABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_RESET_TSF); + + val = ath5k_hw_reg_read(ah, AR5K_BEACON) | AR5K_BEACON_RESET_TSF; + + /* + * Each write to the RESET_TSF bit toggles a hardware internal + * signal to reset TSF, but if left high it will cause a TSF reset + * on the next chip reset as well. Thus we always write the value + * twice to clear the signal. + */ + ath5k_hw_reg_write(ah, val, AR5K_BEACON); + ath5k_hw_reg_write(ah, val, AR5K_BEACON); } /* |