ARM: ux500: pm: Use prcmu_read/write instead

Use prcmu_read/write/modify instead of directly accessing
global prcmu address variable.

ST-Ericsson Linux next: -
ST-Ericsson ID: 370799
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: I7bba660a632b6280f5977d11050a6f11a6b230a9
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/39652
Reviewed-by: Rickard ANDERSSON <rickard.andersson@stericsson.com>
Reviewed-by: QABUILD

1 files changed, 33 insertions, 26 deletions

diff --git a/arch/arm/mach-ux500/pm/pm.c b/arch/arm/mach-ux500/pm/pm.c
index d986d1024d0..14d496fbc51 100644
--- a/arch/arm/mach-ux500/pm/pm.c
+++ b/arch/arm/mach-ux500/pm/pm.c
@@ -12,6 +12,7 @@
 #include <linux/delay.h>
 #include <linux/gpio.h>
 #include <linux/gpio/nomadik.h>
+#include <linux/mfd/dbx500-prcmu.h>
 
 #include <asm/hardware/gic.h>
 #include <asm/processor.h>
@@ -26,25 +27,25 @@
 #define PRCM_ARM_WFI_STANDBY_CPU1_WFI 0x10
 
 /* Dual A9 core interrupt management unit registers */
-#define PRCM_A9_MASK_REQ	(_PRCMU_BASE + 0x328)
+#define PRCM_A9_MASK_REQ	0x328
 #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ	0x1
-#define PRCM_A9_MASK_ACK	(_PRCMU_BASE + 0x32c)
-
-#define PRCM_ARMITMSK31TO0	(_PRCMU_BASE + 0x11c)
-#define PRCM_ARMITMSK63TO32	(_PRCMU_BASE + 0x120)
-#define PRCM_ARMITMSK95TO64	(_PRCMU_BASE + 0x124)
-#define PRCM_ARMITMSK127TO96	(_PRCMU_BASE + 0x128)
-#define PRCM_POWER_STATE_VAL	(_PRCMU_BASE + 0x25C)
-#define PRCM_ARMITVAL31TO0	(_PRCMU_BASE + 0x260)
-#define PRCM_ARMITVAL63TO32	(_PRCMU_BASE + 0x264)
-#define PRCM_ARMITVAL95TO64	(_PRCMU_BASE + 0x268)
-#define PRCM_ARMITVAL127TO96	(_PRCMU_BASE + 0x26C)
+#define PRCM_A9_MASK_ACK	0x32c
+
+#define PRCM_ARMITMSK31TO0	0x11c
+#define PRCM_ARMITMSK63TO32	0x120
+#define PRCM_ARMITMSK95TO64	0x124
+#define PRCM_ARMITMSK127TO96	0x128
+#define PRCM_POWER_STATE_VAL	0x25C
+#define PRCM_ARMITVAL31TO0	0x260
+#define PRCM_ARMITVAL63TO32	0x264
+#define PRCM_ARMITVAL95TO64	0x268
+#define PRCM_ARMITVAL127TO96	0x26C
 
 /* ARM WFI Standby signal register */
-#define PRCM_ARM_WFI_STANDBY    (_PRCMU_BASE + 0x130)
+#define PRCM_ARM_WFI_STANDBY    0x130
 
 /* IO force */
-#define PRCM_IOCR		(_PRCMU_BASE + 0x310)
+#define PRCM_IOCR		0x310
 #define PRCM_IOCR_IOFORCE			0x1
 
 static u32 u8500_gpio_banks[] = {U8500_GPIOBANK0_BASE,
@@ -76,10 +77,11 @@ inline int ux500_pm_arm_on_ext_clk(bool leave_arm_pll_on)
 /* Decouple GIC from the interrupt bus */
 void ux500_pm_gic_decouple(void)
 {
-	writel(readl(PRCM_A9_MASK_REQ) | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
-		PRCM_A9_MASK_REQ);
+	prcmu_write_masked(PRCM_A9_MASK_REQ,
+			   PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
+			   PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ);
 
-	while (!readl(PRCM_A9_MASK_REQ))
+	while (!prcmu_read(PRCM_A9_MASK_REQ))
 		cpu_relax();
 
 	/* TODO: Use the ack bit when possible */
@@ -89,8 +91,9 @@ void ux500_pm_gic_decouple(void)
 /* Recouple GIC with the interrupt bus */
 void ux500_pm_gic_recouple(void)
 {
-	writel((readl(PRCM_A9_MASK_REQ) & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ),
-	       PRCM_A9_MASK_REQ);
+	prcmu_write_masked(PRCM_A9_MASK_REQ,
+			   PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
+			   0);
 
 	/* TODO: Use the ack bit when possible */
 }
@@ -125,8 +128,8 @@ bool ux500_pm_prcmu_pending_interrupt(void)
 
 	for (i = 0; i < GIC_NUMBER_SPI_REGS; i++) { /* There are 4 registers */
 
-		it = readl(PRCM_ARMITVAL31TO0 + i * 4);
-		im = readl(PRCM_ARMITMSK31TO0 + i * 4);
+		it = prcmu_read(PRCM_ARMITVAL31TO0 + i * 4);
+		im = prcmu_read(PRCM_ARMITMSK31TO0 + i * 4);
 
 		if (it & im)
 			return true; /* There is a pending interrupt */
@@ -138,9 +141,13 @@ bool ux500_pm_prcmu_pending_interrupt(void)
 void ux500_pm_prcmu_set_ioforce(bool enable)
 {
 	if (enable)
-		writel(readl(PRCM_IOCR) | PRCM_IOCR_IOFORCE, PRCM_IOCR);
+		prcmu_write_masked(PRCM_IOCR,
+				   PRCM_IOCR_IOFORCE,
+				   PRCM_IOCR_IOFORCE);
 	else
-		writel(readl(PRCM_IOCR) & ~PRCM_IOCR_IOFORCE, PRCM_IOCR);
+		prcmu_write_masked(PRCM_IOCR,
+				   PRCM_IOCR_IOFORCE,
+				   0);
 }
 
 void ux500_pm_prcmu_copy_gic_settings(void)
@@ -152,7 +159,7 @@ void ux500_pm_prcmu_copy_gic_settings(void)
 		/* +1 due to skip STI and PPI */
 		er = readl_relaxed(__io_address(U8500_GIC_DIST_BASE) +
 			   GIC_DIST_ENABLE_SET + (i + 1) * 4);
-		writel(er, PRCM_ARMITMSK31TO0 + i * 4);
+		prcmu_write(PRCM_ARMITMSK31TO0 + i * 4, er);
 	}
 }
 
@@ -196,12 +203,12 @@ bool ux500_pm_other_cpu_wfi(void)
 {
 	if (smp_processor_id()) {
 		/* We are CPU 1 => check if CPU0 is in WFI */
-		if (readl(PRCM_ARM_WFI_STANDBY) &
+		if (prcmu_read(PRCM_ARM_WFI_STANDBY) &
 		    PRCM_ARM_WFI_STANDBY_CPU0_WFI)
 			return true;
 	} else {
 		/* We are CPU 0 => check if CPU1 is in WFI */
-		if (readl(PRCM_ARM_WFI_STANDBY) &
+		if (prcmu_read(PRCM_ARM_WFI_STANDBY) &
 		    PRCM_ARM_WFI_STANDBY_CPU1_WFI)
 			return true;
 	}