diff options
| author | Philippe Langlais <philippe.langlais@linaro.org> | 2012-01-13 15:55:42 +0100 |
|---|---|---|
| committer | Philippe Langlais <philippe.langlais@stericsson.com> | 2012-05-22 10:59:24 +0200 |
| commit | db39c4b3e55e394aff1accaf4f4a632e6bc9ff22 (patch) | |
| tree | 49c36b2dabeecbb83e121f4bc7166a4073c7d776 | |
| parent | d70684c81afb9294834e31375871573a2346e417 (diff) | |
clock: ux500: Add new dsi clocks for mcde
dsi_pll, dsi0clk, dsi1clk and dsixescclk is added to the
clock struct for u8500.
Set rate of dsi_pll, hdmi and tv clk is performed in
init_display_devices in board-mop500-mcde.c
Signed-off-by: Jimmy Rubin <jimmy.rubin@stericsson.com>
| -rw-r--r-- | arch/arm/mach-ux500/clock-db8500.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/clock-db8500.c b/arch/arm/mach-ux500/clock-db8500.c index cdc7a99451c..8ed83504f32 100644 --- a/arch/arm/mach-ux500/clock-db8500.c +++ b/arch/arm/mach-ux500/clock-db8500.c @@ -810,6 +810,12 @@ static struct clk_lookup u8500_clocks[] = { CLK_LOOKUP(sspclk, "SSP", NULL), CLK_LOOKUP(rngclk, "rngclk", NULL), CLK_LOOKUP(uiccclk, "uicc", NULL), + CLK_LOOKUP(dsi0clk, "mcde", "dsihs0"), + CLK_LOOKUP(dsi1clk, "mcde", "dsihs1"), + CLK_LOOKUP(dsi_pll, "mcde", "dsihs2"), + CLK_LOOKUP(dsi0escclk, "mcde", "dsilp0"), + CLK_LOOKUP(dsi1escclk, "mcde", "dsilp1"), + CLK_LOOKUP(dsi2escclk, "mcde", "dsilp2"), /* PERIPH 1 */ CLK_LOOKUP(p1_msp3_clk, "msp3", NULL), |