u5500: prcmu: implement DDR OPP handling

ST-Ericsson ID: 348762
ST-Ericsson FOSS-OUT ID: Trivial
ST-Ericsson Linux next: NA

Change-Id: I26770ee6151f91c70eebba1c1c460e7cdedd43e1
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/30502
Reviewed-by: QATOOLS
Reviewed-by: QABUILD
Reviewed-by: Vijaya Kumar K-1 <vijay.kilari@stericsson.com>
Reviewed-by: Mattias NILSSON <mattias.i.nilsson@stericsson.com>
Reviewed-by: QATEST
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/32601
Tested-by: Venkata Biswanath DEVARASETTY <venkata.biswanath@stericsson.com>

6 files changed, 53 insertions, 10 deletions

diff --git a/drivers/mfd/db5500-prcmu-regs.h b/drivers/mfd/db5500-prcmu-regs.h
index 12e8d10ca46..e8aa2901478 100644
--- a/drivers/mfd/db5500-prcmu-regs.h
+++ b/drivers/mfd/db5500-prcmu-regs.h
@@ -116,6 +116,7 @@
 
 #define PRCM_MMIP_LS_CLAMP_SET 0x420
 #define PRCM_MMIP_LS_CLAMP_CLR 0x424
+#define PRCM_DDR_SUBSYS_APE_MINBW 0x438
 
 /* Miscellaneous unit registers */
 #define PRCM_DSI_SW_RESET 0x324
diff --git a/drivers/mfd/db5500-prcmu.c b/drivers/mfd/db5500-prcmu.c
index dc19b13416b..81c65c07a6e 100644
--- a/drivers/mfd/db5500-prcmu.c
+++ b/drivers/mfd/db5500-prcmu.c
@@ -1228,6 +1228,24 @@ int db5500_prcmu_get_ape_opp(void)
 	}
 }
 
+int db5500_prcmu_get_ddr_opp(void)
+{
+	return readb(_PRCMU_BASE + PRCM_DDR_SUBSYS_APE_MINBW);
+}
+
+int db5500_prcmu_set_ddr_opp(u8 opp)
+{
+	if (cpu_is_u5500v1())
+		return -EINVAL;
+
+	if (opp != DDR_100_OPP && opp != DDR_50_OPP)
+		return -EINVAL;
+
+	writeb(opp, _PRCMU_BASE + PRCM_DDR_SUBSYS_APE_MINBW);
+
+	return 0;
+}
+
 /**
  * db5500_prcmu_get_arm_opp - get the current ARM OPP
  *
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index e833ec096aa..fe09270a4d2 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -924,23 +924,23 @@ int db8500_prcmu_get_arm_opp(void)
 }
 
 /**
- * prcmu_get_ddr_opp - get the current DDR OPP
+ * db8500_prcmu_get_ddr_opp - get the current DDR OPP
  *
  * Returns: the current DDR OPP
  */
-int prcmu_get_ddr_opp(void)
+int db8500_prcmu_get_ddr_opp(void)
 {
 	return readb(PRCM_DDR_SUBSYS_APE_MINBW);
 }
 
 /**
- * set_ddr_opp - set the appropriate DDR OPP
+ * db8500_set_ddr_opp - set the appropriate DDR OPP
  * @opp: The new DDR operating point to which transition is to be made
  * Returns: 0 on success, non-zero on failure
  *
  * This function sets the operating point of the DDR.
  */
-int prcmu_set_ddr_opp(u8 opp)
+int db8500_prcmu_set_ddr_opp(u8 opp)
 {
 	if (opp < DDR_100_OPP || opp > DDR_25_OPP)
 		return -EINVAL;
diff --git a/include/linux/mfd/db5500-prcmu.h b/include/linux/mfd/db5500-prcmu.h
index 2edcf0699ad..b70811dc563 100644
--- a/include/linux/mfd/db5500-prcmu.h
+++ b/include/linux/mfd/db5500-prcmu.h
@@ -32,6 +32,8 @@ int db5500_prcmu_set_arm_opp(u8 opp);
 int db5500_prcmu_get_arm_opp(void);
 int db5500_prcmu_set_ape_opp(u8 opp);
 int db5500_prcmu_get_ape_opp(void);
+int db5500_prcmu_set_ddr_opp(u8 opp);
+int db5500_prcmu_get_ddr_opp(void);
 
 static inline unsigned long prcmu_clock_rate(u8 clock)
 {
@@ -154,6 +156,16 @@ static inline int db5500_prcmu_get_ape_opp(void)
 	return 0;
 }
 
+static inline int db5500_prcmu_set_ddr_opp(u8 opp)
+{
+	return 0;
+}
+
+static inline int db5500_prcmu_get_ddr_opp(void)
+{
+	return 0;
+}
+
 #endif /* CONFIG_MFD_DB5500_PRCMU */
 
 #endif /* __MFD_DB5500_PRCMU_H */
diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h
index 97a60866bda..1b92aabf0bc 100644
--- a/include/linux/mfd/db8500-prcmu.h
+++ b/include/linux/mfd/db8500-prcmu.h
@@ -503,8 +503,6 @@ bool prcmu_has_arm_maxopp(void);
 bool prcmu_is_u8400(void);
 int prcmu_request_ape_opp_100_voltage(bool enable);
 int prcmu_release_usb_wakeup_state(void);
-int prcmu_set_ddr_opp(u8 opp);
-int prcmu_get_ddr_opp(void);
 /* NOTE! Use regulator framework instead */
 int prcmu_set_hwacc(u16 hw_acc_dev, u8 state);
 void prcmu_configure_auto_pm(struct prcmu_auto_pm_config *sleep,
@@ -548,6 +546,8 @@ int db8500_prcmu_set_arm_opp(u8 opp);
 int db8500_prcmu_get_arm_opp(void);
 int db8500_prcmu_set_ape_opp(u8 opp);
 int db8500_prcmu_get_ape_opp(void);
+int db8500_prcmu_set_ddr_opp(u8 opp);
+int db8500_prcmu_get_ddr_opp(void);
 
 #else /* !CONFIG_MFD_DB8500_PRCMU */
 
@@ -598,12 +598,12 @@ static inline int prcmu_release_usb_wakeup_state(void)
 	return 0;
 }
 
-static inline int prcmu_set_ddr_opp(u8 opp)
+static inline int db8500_prcmu_set_ddr_opp(u8 opp)
 {
 	return 0;
 }
 
-static inline int prcmu_get_ddr_opp(void)
+static inline int db8500_prcmu_get_ddr_opp(void)
 {
 	return DDR_100_OPP;
 }
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index 76c4f27b251..73d6a52d731 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -320,8 +320,20 @@ unsigned long prcmu_clock_rate(u8 clock);
 long prcmu_round_clock_rate(u8 clock, unsigned long rate);
 int prcmu_set_clock_rate(u8 clock, unsigned long rate);
 
-int prcmu_set_ddr_opp(u8 opp);
-int prcmu_get_ddr_opp(void);
+static inline int prcmu_set_ddr_opp(u8 opp)
+{
+	if (cpu_is_u5500())
+		return db5500_prcmu_set_ddr_opp(opp);
+	else
+		return db8500_prcmu_set_ddr_opp(opp);
+}
+static inline int prcmu_get_ddr_opp(void)
+{
+	if (cpu_is_u5500())
+		return db5500_prcmu_get_ddr_opp();
+	else
+		return db8500_prcmu_get_ddr_opp();
+}
 
 static inline int prcmu_set_arm_opp(u8 opp)
 {