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| author | Philippe Langlais <philippe.langlais@stericsson.com> | 2012-06-04 19:46:24 +0800 |
|---|---|---|
| committer | Philippe Langlais <philippe.langlais@stericsson.com> | 2012-06-04 19:46:24 +0800 |
| commit | 29a3e1ef73daaa91cbf5cce2fb475f1878254402 (patch) | |
| tree | fbd1df992706a4786633a7986a31b9cf78b3dced /arch/arm/mm/cache-v6.S | |
| parent | 564119271649aa2d1840e79badf743e957b497e6 (diff) | |
| parent | 3c16bd7bb0a2b00b71f65bb0075e0c94d0fcc777 (diff) | |
Merge Linaro Android branch ' jstultz/linaro-android-3.4
' into integration-android-ux500
Signed-off-by: Philippe Langlais <philippe.langlais@stericsson.com>
Diffstat (limited to 'arch/arm/mm/cache-v6.S')
| -rw-r--r-- | arch/arm/mm/cache-v6.S | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index b88dd4ab038..7c278122887 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S @@ -272,6 +272,11 @@ v6_dma_clean_range: * - end - virtual end address of region */ ENTRY(v6_dma_flush_range) +#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT + sub r2, r1, r0 + cmp r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT + bhi v6_dma_flush_dcache_all +#endif #ifdef CONFIG_DMA_CACHE_RWFO ldrb r2, [r0] @ read for ownership strb r2, [r0] @ write for ownership @@ -294,6 +299,18 @@ ENTRY(v6_dma_flush_range) mcr p15, 0, r0, c7, c10, 4 @ drain write buffer mov pc, lr +#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT +v6_dma_flush_dcache_all: + mov r0, #0 +#ifdef HARVARD_CACHE + mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate +#else + mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate +#endif + mcr p15, 0, r0, c7, c10, 4 @ drain write buffer + mov pc, lr +#endif + /* * dma_map_area(start, size, dir) * - start - kernel virtual start address |