summaryrefslogtreecommitdiff
path: root/drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h')
-rw-r--r--drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h124
1 files changed, 119 insertions, 5 deletions
diff --git a/drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h b/drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h
index 94bce94d4e1..c4a13796ba9 100644
--- a/drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h
+++ b/drivers/gpu/mali/mali400ko/driver/src/devicedrv/mali/common/mali_kernel_rendercore.h
@@ -188,6 +188,13 @@ typedef struct mali_core_session
struct mali_session_data * mmu_session; /* The session associated with the MMU page tables for this core */
#endif
u32 magic_nr;
+#if MALI_STATE_TRACKING
+ _mali_osk_atomic_t jobs_received;
+ _mali_osk_atomic_t jobs_started;
+ _mali_osk_atomic_t jobs_ended;
+ _mali_osk_atomic_t jobs_returned;
+ u32 pid;
+#endif
} mali_core_session;
@@ -204,6 +211,7 @@ typedef struct mali_core_job
u32 start_time_jiffies;
unsigned long watchdog_jiffies;
u32 abort_id;
+ u32 job_nr;
} mali_core_job;
/*
@@ -309,11 +317,117 @@ typedef struct register_array_user
if ( rendercores_global_mutex_owner != _mali_osk_get_tid() ) MALI_PRINT_ERROR(("Owner mismatch"));\
} while (0)
+MALI_STATIC_INLINE _mali_osk_errcode_t mali_core_renderunit_register_rw_check(mali_core_renderunit *core,
+ u32 relative_address)
+{
+#if USING_MALI_PMM
+ if( core->state == CORE_OFF )
+ {
+ MALI_PRINT_ERROR(("Core is OFF during access: Core: %s Addr: 0x%04X\n",
+ core->description,relative_address));
+ MALI_ERROR(_MALI_OSK_ERR_FAULT);
+ }
+#endif
+
+ MALI_DEBUG_ASSERT((relative_address & 0x03) == 0);
+
+ if (mali_benchmark) MALI_ERROR(_MALI_OSK_ERR_FAULT);
+
+ MALI_DEBUG_CODE(if (relative_address >= core->size)
+ {
+ MALI_PRINT_ERROR(("Trying to access illegal register: 0x%04x in core: %s",
+ relative_address, core->description));
+ MALI_ERROR(_MALI_OSK_ERR_FAULT);
+ })
+
+ MALI_SUCCESS;
+}
-u32 mali_core_renderunit_register_read(struct mali_core_renderunit *core, u32 relative_address);
-void mali_core_renderunit_register_read_array(struct mali_core_renderunit *core, u32 relative_address, u32 * result_array, u32 nr_of_regs);
-void mali_core_renderunit_register_write(struct mali_core_renderunit *core, u32 relative_address, u32 new_val);
-void mali_core_renderunit_register_write_array(struct mali_core_renderunit *core, u32 relative_address, u32 * write_array, u32 nr_of_regs);
+
+MALI_STATIC_INLINE u32 mali_core_renderunit_register_read(struct mali_core_renderunit *core, u32 relative_address)
+{
+ u32 read_val;
+
+ if(_MALI_OSK_ERR_FAULT == mali_core_renderunit_register_rw_check(core, relative_address))
+ return 0xDEADBEEF;
+
+ read_val = _mali_osk_mem_ioread32(core->registers_mapped, relative_address);
+
+ MALI_DEBUG_PRINT(6, ("Core: renderunit_register_read: Core:%s Addr:0x%04X Val:0x%08x\n",
+ core->description,relative_address, read_val));
+
+ return read_val;
+}
+
+MALI_STATIC_INLINE void mali_core_renderunit_register_read_array(struct mali_core_renderunit *core,
+ u32 relative_address,
+ u32 * result_array,
+ u32 nr_of_regs)
+{
+ /* NOTE Do not use burst reads against the registers */
+ u32 i;
+
+ MALI_DEBUG_PRINT(6, ("Core: renderunit_register_read_array: Core:%s Addr:0x%04X Nr_regs: %u\n",
+ core->description,relative_address, nr_of_regs));
+
+ for(i=0; i<nr_of_regs; ++i)
+ {
+ result_array[i] = mali_core_renderunit_register_read(core, relative_address + i*4);
+ }
+}
+
+/*
+ * Write to a core register, and bypass implied memory barriers.
+ *
+ * On some systems, _mali_osk_mem_iowrite32() implies a memory barrier. This
+ * can be a performance problem when doing many writes in sequence.
+ *
+ * When using this function, ensure proper barriers are put in palce. Most
+ * likely a _mali_osk_mem_barrier() is needed after all related writes are
+ * completed.
+ *
+ */
+MALI_STATIC_INLINE void mali_core_renderunit_register_write_relaxed(mali_core_renderunit *core,
+ u32 relative_address,
+ u32 new_val)
+{
+ if(_MALI_OSK_ERR_FAULT == mali_core_renderunit_register_rw_check(core, relative_address))
+ return;
+
+ MALI_DEBUG_PRINT(6, ("mali_core_renderunit_register_write_relaxed: Core:%s Addr:0x%04X Val:0x%08x\n",
+ core->description,relative_address, new_val));
+
+ _mali_osk_mem_iowrite32_relaxed(core->registers_mapped, relative_address, new_val);
+}
+
+MALI_STATIC_INLINE void mali_core_renderunit_register_write(struct mali_core_renderunit *core,
+ u32 relative_address,
+ u32 new_val)
+{
+ MALI_DEBUG_PRINT(6, ("mali_core_renderunit_register_write: Core:%s Addr:0x%04X Val:0x%08x\n",
+ core->description,relative_address, new_val));
+
+ if(_MALI_OSK_ERR_FAULT == mali_core_renderunit_register_rw_check(core, relative_address))
+ return;
+
+ _mali_osk_mem_iowrite32(core->registers_mapped, relative_address, new_val);
+}
+
+MALI_STATIC_INLINE void mali_core_renderunit_register_write_array(struct mali_core_renderunit *core,
+ u32 relative_address,
+ u32 * write_array,
+ u32 nr_of_regs)
+{
+ u32 i;
+ MALI_DEBUG_PRINT(6, ("Core: renderunit_register_write_array: Core:%s Addr:0x%04X Nr_regs: %u\n",
+ core->description,relative_address, nr_of_regs));
+
+ /* Do not use burst writes against the registers */
+ for( i = 0; i< nr_of_regs; i++)
+ {
+ mali_core_renderunit_register_write_relaxed(core, relative_address + i*4, write_array[i]);
+ }
+}
_mali_osk_errcode_t mali_core_renderunit_init(struct mali_core_renderunit * core);
void mali_core_renderunit_term(struct mali_core_renderunit * core);
@@ -349,7 +463,7 @@ _mali_osk_errcode_t mali_core_subsystem_signal_power_up(mali_core_subsystem *sub
#endif
#if MALI_STATE_TRACKING
-void mali_core_renderunit_dump_state(mali_core_subsystem* subsystem);
+u32 mali_core_renderunit_dump_state(mali_core_subsystem* subsystem, char *buf, u32 size);
#endif
#endif /* __MALI_RENDERCORE_H__ */