diff options
Diffstat (limited to 'drivers/staging/nmf-cm/share')
9 files changed, 595 insertions, 0 deletions
diff --git a/drivers/staging/nmf-cm/share/communication/inc/communication_fifo.h b/drivers/staging/nmf-cm/share/communication/inc/communication_fifo.h new file mode 100644 index 00000000000..ea24e82ceae --- /dev/null +++ b/drivers/staging/nmf-cm/share/communication/inc/communication_fifo.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_NMF_COM_FIFO +#define __INC_NMF_COM_FIFO + +#include <inc/typedef.h> + +#define EVENT_ELEM_METHOD_IDX 0 +#define EVENT_ELEM_PARAM_IDX 1 +#define EVENT_ELEM_EXTFIELD_IDX 2 + +#define EVENT_ELEM_SIZE_IN_BYTE (3 * sizeof(t_shared_field)) + +#endif /* __INC_NMF_COM_FIFO */ diff --git a/drivers/staging/nmf-cm/share/communication/inc/initializer.h b/drivers/staging/nmf-cm/share/communication/inc/initializer.h new file mode 100644 index 00000000000..10985c3981a --- /dev/null +++ b/drivers/staging/nmf-cm/share/communication/inc/initializer.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_SHARE_INITIALIZER +#define __INC_SHARE_INITIALIZER + +#define NMF_CONSTRUCT_INDEX 0 +#define NMF_START_INDEX 1 +#define NMF_STOP_INDEX 2 +#define NMF_DESTROY_INDEX 3 +#define NMF_UPDATE_STACK 4 +#define NMF_LOCK_CACHE 5 +#define NMF_UNLOCK_CACHE 6 +#define NMF_ULP_FORCEWAKEUP 7 +#define NMF_ULP_ALLOWSLEEP 8 +#define NMF_CONSTRUCT_SYNC_INDEX 9 +#define NMF_START_SYNC_INDEX 10 +#define NMF_STOP_SYNC_INDEX 11 + +/* + * Index of datas in command parameter format + */ +#define INIT_COMPONENT_CMD_HANDLE_INDEX 0 +#define INIT_COMPONENT_CMD_THIS_INDEX 2 +#define INIT_COMPONENT_CMD_METHOD_INDEX 4 +#define INIT_COMPONENT_CMD_SIZE 6 + +/* + * Index of datas in acknowledge parameter format + */ +#define INIT_COMPONENT_ACK_HANDLE_INDEX 0 +#define INIT_COMPONENT_ACK_SIZE 2 + +#endif /* __INC_SHARE_INITIALIZER */ diff --git a/drivers/staging/nmf-cm/share/communication/inc/nmf_fifo_desc.h b/drivers/staging/nmf-cm/share/communication/inc/nmf_fifo_desc.h new file mode 100644 index 00000000000..99caa48b05c --- /dev/null +++ b/drivers/staging/nmf-cm/share/communication/inc/nmf_fifo_desc.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_NMF_FIFO_DESC +#define __INC_NMF_FIFO_DESC + +#include <inc/typedef.h> +#include <share/semaphores/inc/semaphores.h> + +/* + * SHOULD be mapped onto a AHB burst (16 bytes=8x16-bit) + */ +typedef struct { + t_semaphore_id semId; + + t_uint16 elemSize; + t_uint16 fifoFullValue; + t_uint16 readIndex; + t_uint16 writeIndex; + t_uint16 wrappingValue; + + t_uint32 extendedField; /* in DSP 24 memory when to MPC in Logical Host when to ARM */ +} t_nmf_fifo_desc; + +#define EXTENDED_FIELD_BCTHIS_OR_TOP 0 //<! This field will be used: + //<! - as hostBCThis for DSP->HOST binding + //<! - as TOP else +#define EXTENDED_FIELD_BCDESC 1 //<! This field will be used for: + //<! - interface method address for ->MPC binding + //<! - for params size for ->Host binding (today only [0] is used as max size) + +#endif /* __INC_NMF_FIFO */ diff --git a/drivers/staging/nmf-cm/share/communication/inc/nmf_service.h b/drivers/staging/nmf-cm/share/communication/inc/nmf_service.h new file mode 100644 index 00000000000..71dfc534f97 --- /dev/null +++ b/drivers/staging/nmf-cm/share/communication/inc/nmf_service.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_NMF_SERVICE_H +#define __INC_NMF_SERVICE_H + +/* 1 - 0xff Reserved for Panic Reason */ +#define MPC_SERVICE_NONE 0 +#define MPC_SERVICE_BOOT 0xB001 +#define MPC_SERVICE_PRINT 0x1234 +#define MPC_SERVICE_TRACE 0x789 + +#endif diff --git a/drivers/staging/nmf-cm/share/inc/macros.h b/drivers/staging/nmf-cm/share/inc/macros.h new file mode 100644 index 00000000000..7d2c2289cd3 --- /dev/null +++ b/drivers/staging/nmf-cm/share/inc/macros.h @@ -0,0 +1,213 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * Author: Jean-Philippe FASSINO <jean-philippe.fassino@stericsson.com> for ST-Ericsson. + * License terms: GNU General Public License (GPL), version 2, with + * user space exemption described in the top-level COPYING file in + * the Linux kernel source tree. + */ +/*! + * \brief NMF Macro API. + */ + +#ifndef _COMMON_MACROS_H_ +#define _COMMON_MACROS_H_ + +#undef ALIGN_VALUE +#define ALIGN_VALUE(value, alignment) (((value) + (alignment - 1)) & ~(alignment - 1)) + +#undef MIN +#define MIN(a,b) (((a)>(b))?(b):(a)) + +#undef MAX +#define MAX(a,b) (((a)<(b))?(b):(a)) + +/*----------------------------------------------------------------------------- + * endianess switch macros (32 bits and 16 bits) + *---------------------------------------------------------------------------*/ +#define ENDIANESS_32_SWITCH(value) ( \ + (((value) & MASK_BYTE3) >> SHIFT_BYTE3) | \ + (((value) & MASK_BYTE2) >> SHIFT_BYTE1) | \ + (((value) & MASK_BYTE1) << SHIFT_BYTE1) | \ + (((value) & MASK_BYTE0) << SHIFT_BYTE3) \ + ) + +#define ENDIANESS_16_SWITCH(value) ( \ + (((value) & MASK_BYTE0) << SHIFT_BYTE1) | \ + (((value) & MASK_BYTE1) >> SHIFT_BYTE1) \ + ) + +/*----------------------------------------------------------------------------- + * field offset extraction from a structure + *---------------------------------------------------------------------------*/ +#undef FIELD_OFFSET +#define FIELD_OFFSET(typeName, fieldName) ((t_uint32)(&(((typeName *)0)->fieldName))) + +#undef MASK_BIT +#define MASK_BIT(n) (1UL << ((n) - 1)) + +/*----------------------------------------------------------------------------- + * Misc definition + *---------------------------------------------------------------------------*/ + +#undef ONE_KB +#define ONE_KB (1024) +#undef ONE_MB +#define ONE_MB (ONE_KB * ONE_KB) + +/*----------------------------------------------------------------------------- + * Bit mask definition + *---------------------------------------------------------------------------*/ +#undef MASK_NULL8 +#define MASK_NULL8 0x00U +#undef MASK_NULL16 +#define MASK_NULL16 0x0000U +#undef MASK_NULL32 +#define MASK_NULL32 0x00000000UL +#undef MASK_ALL8 +#define MASK_ALL8 0xFFU +#undef MASK_ALL16 +#define MASK_ALL16 0xFFFFU +#undef MASK_ALL32 +#define MASK_ALL32 0xFFFFFFFFUL + +#undef MASK_BIT0 +#define MASK_BIT0 (1UL<<0) +#undef MASK_BIT1 +#define MASK_BIT1 (1UL<<1) +#undef MASK_BIT2 +#define MASK_BIT2 (1UL<<2) +#undef MASK_BIT3 +#define MASK_BIT3 (1UL<<3) +#undef MASK_BIT4 +#define MASK_BIT4 (1UL<<4) +#undef MASK_BIT5 +#define MASK_BIT5 (1UL<<5) +#undef MASK_BIT6 +#define MASK_BIT6 (1UL<<6) +#undef MASK_BIT7 +#define MASK_BIT7 (1UL<<7) +#undef MASK_BIT8 +#define MASK_BIT8 (1UL<<8) +#undef MASK_BIT9 +#define MASK_BIT9 (1UL<<9) +#undef MASK_BIT10 +#define MASK_BIT10 (1UL<<10) +#undef MASK_BIT11 +#define MASK_BIT11 (1UL<<11) +#undef MASK_BIT12 +#define MASK_BIT12 (1UL<<12) +#undef MASK_BIT13 +#define MASK_BIT13 (1UL<<13) +#undef MASK_BIT14 +#define MASK_BIT14 (1UL<<14) +#undef MASK_BIT15 +#define MASK_BIT15 (1UL<<15) +#undef MASK_BIT16 +#define MASK_BIT16 (1UL<<16) +#undef MASK_BIT17 +#define MASK_BIT17 (1UL<<17) +#undef MASK_BIT18 +#define MASK_BIT18 (1UL<<18) +#undef MASK_BIT19 +#define MASK_BIT19 (1UL<<19) +#undef MASK_BIT20 +#define MASK_BIT20 (1UL<<20) +#undef MASK_BIT21 +#define MASK_BIT21 (1UL<<21) +#undef MASK_BIT22 +#define MASK_BIT22 (1UL<<22) +#undef MASK_BIT23 +#define MASK_BIT23 (1UL<<23) +#undef MASK_BIT24 +#define MASK_BIT24 (1UL<<24) +#undef MASK_BIT25 +#define MASK_BIT25 (1UL<<25) +#undef MASK_BIT26 +#define MASK_BIT26 (1UL<<26) +#undef MASK_BIT27 +#define MASK_BIT27 (1UL<<27) +#undef MASK_BIT28 +#define MASK_BIT28 (1UL<<28) +#undef MASK_BIT29 +#define MASK_BIT29 (1UL<<29) +#undef MASK_BIT30 +#define MASK_BIT30 (1UL<<30) +#undef MASK_BIT31 +#define MASK_BIT31 (1UL<<31) + +/*----------------------------------------------------------------------------- + * quartet shift definition + *---------------------------------------------------------------------------*/ +#undef MASK_QUARTET +#define MASK_QUARTET (0xFUL) +#undef SHIFT_QUARTET0 +#define SHIFT_QUARTET0 0 +#undef SHIFT_QUARTET1 +#define SHIFT_QUARTET1 4 +#undef SHIFT_QUARTET2 +#define SHIFT_QUARTET2 8 +#undef SHIFT_QUARTET3 +#define SHIFT_QUARTET3 12 +#undef SHIFT_QUARTET4 +#define SHIFT_QUARTET4 16 +#undef SHIFT_QUARTET5 +#define SHIFT_QUARTET5 20 +#undef SHIFT_QUARTET6 +#define SHIFT_QUARTET6 24 +#undef SHIFT_QUARTET7 +#define SHIFT_QUARTET7 28 +#undef MASK_QUARTET0 +#define MASK_QUARTET0 (MASK_QUARTET << SHIFT_QUARTET0) +#undef MASK_QUARTET1 +#define MASK_QUARTET1 (MASK_QUARTET << SHIFT_QUARTET1) +#undef MASK_QUARTET2 +#define MASK_QUARTET2 (MASK_QUARTET << SHIFT_QUARTET2) +#undef MASK_QUARTET3 +#define MASK_QUARTET3 (MASK_QUARTET << SHIFT_QUARTET3) +#undef MASK_QUARTET4 +#define MASK_QUARTET4 (MASK_QUARTET << SHIFT_QUARTET4) +#undef MASK_QUARTET5 +#define MASK_QUARTET5 (MASK_QUARTET << SHIFT_QUARTET5) +#undef MASK_QUARTET6 +#define MASK_QUARTET6 (MASK_QUARTET << SHIFT_QUARTET6) +#undef MASK_QUARTET7 +#define MASK_QUARTET7 (MASK_QUARTET << SHIFT_QUARTET7) + +/*----------------------------------------------------------------------------- + * Byte shift definition + *---------------------------------------------------------------------------*/ +#undef MASK_BYTE +#define MASK_BYTE (0xFFUL) +#undef SHIFT_BYTE0 +#define SHIFT_BYTE0 0U +#undef SHIFT_BYTE1 +#define SHIFT_BYTE1 8U +#undef SHIFT_BYTE2 +#define SHIFT_BYTE2 16U +#undef SHIFT_BYTE3 +#define SHIFT_BYTE3 24U +#undef MASK_BYTE0 +#define MASK_BYTE0 (MASK_BYTE << SHIFT_BYTE0) +#undef MASK_BYTE1 +#define MASK_BYTE1 (MASK_BYTE << SHIFT_BYTE1) +#undef MASK_BYTE2 +#define MASK_BYTE2 (MASK_BYTE << SHIFT_BYTE2) +#undef MASK_BYTE3 +#define MASK_BYTE3 (MASK_BYTE << SHIFT_BYTE3) + +/*----------------------------------------------------------------------------- + * Halfword shift definition + *---------------------------------------------------------------------------*/ +#undef MASK_HALFWORD +#define MASK_HALFWORD (0xFFFFUL) +#undef SHIFT_HALFWORD0 +#define SHIFT_HALFWORD0 0U +#undef SHIFT_HALFWORD1 +#define SHIFT_HALFWORD1 16U +#undef MASK_HALFWORD0 +#define MASK_HALFWORD0 (MASK_HALFWORD << SHIFT_HALFWORD0) +#undef MASK_HALFWORD1 +#define MASK_HALFWORD1 (MASK_HALFWORD << SHIFT_HALFWORD1) + +#endif /* _COMMON_MACROS_H_ */ + diff --git a/drivers/staging/nmf-cm/share/inc/nmf.h b/drivers/staging/nmf-cm/share/inc/nmf.h new file mode 100644 index 00000000000..2f73311c2f3 --- /dev/null +++ b/drivers/staging/nmf-cm/share/inc/nmf.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * Author: Jean-Philippe FASSINO <jean-philippe.fassino@stericsson.com> for ST-Ericsson. + * License terms: GNU General Public License (GPL), version 2, with + * user space exemption described in the top-level COPYING file in + * the Linux kernel source tree. + */ +/*! + * \brief Common Nomadik Multiprocessing Framework type definition + * + * This file contains the shared type definitions used into NMF. + */ + +#ifndef __INC_NMF_H +#define __INC_NMF_H + +#include <inc/typedef.h> + +/*! + * \brief Identification of the various cores (host cpu and Media Processors) into Nomadik Platform + * In order to improve performance, these ids are those used to interconnect HW Semaphores IP with Cores (Interrupt lines) + * \ingroup NMF_COMMON + */ +#if defined(__STN_8500) + //#warning "TODO : mapping below is not correct, need to think how to change it" +#endif +typedef t_uint8 t_nmf_core_id; +#define ARM_CORE_ID ((t_nmf_core_id)0) //!< HOST CPU Id +#define SVA_CORE_ID ((t_nmf_core_id)1) //!< Smart Video Accelerator Media Processor Code Id +#define SIA_CORE_ID ((t_nmf_core_id)2) //!< Smart Imaging Accelerator Media Processor Code Id +#define NB_CORE_IDS ((t_nmf_core_id)3) + +#define FIRST_CORE_ID ((t_nmf_core_id)ARM_CORE_ID) +#define FIRST_MPC_ID ((t_nmf_core_id)SVA_CORE_ID) +#define LAST_CORE_ID ((t_nmf_core_id)SIA_CORE_ID) +#define LAST_MPC_ID ((t_nmf_core_id)SIA_CORE_ID) + + +/*! + * \brief Define minimal stack size use by execution engine + */ +#define MIN_STACK_SIZE 128 + + + +#endif /* __INC_NMF_H */ diff --git a/drivers/staging/nmf-cm/share/inc/nomadik_mapping.h b/drivers/staging/nmf-cm/share/inc/nomadik_mapping.h new file mode 100644 index 00000000000..bec221aa111 --- /dev/null +++ b/drivers/staging/nmf-cm/share/inc/nomadik_mapping.h @@ -0,0 +1,98 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_NOMADIK_MAPPING_H +#define __INC_NOMADIK_MAPPING_H + +/*--------------------------------------------------------------------------*/ +#if defined(__STN_8810) + +/* XTI (CPU OSMO/OSMOT address space) */ +#define XTI_CPU_BASE_ADDR 0x10000000 +#define XTI_CPU_END_ADDR 0x100FFFFF + +/* XTI configuration registers */ +#define XTI_CFG_REG_BASE_ADDR 0x101A0000 +#define XTI_CFG_REG_END_ADDR 0x101AFFFF + +/* Core APB Peripherals */ +#define CORE_APB_BASE_ADDR 0x101E0000 +#define CORE_APB_END_ADDR 0x101EFFFF + +/* DMA APB Peripherals */ +#define DMA_APB_BASE_ADDR 0x101F0000 +#define DMA_APB_END_ADDR 0x101FFFFF + +/* XTI (DSP OSMO/OSMOT address space) */ +#define XTI_DSP_BASE_ADDR 0x10200000 +#define XTI_DSP_END_ADDR 0x1020FFFF + +#endif /* defined(__STN_8810) */ + +/*--------------------------------------------------------------------------*/ +#if defined(__STN_8815) + +/* XTI (CPU OSMO/OSMOT address space) */ +#define XTI_CPU_BASE_ADDR 0x10000000 +#define XTI_CPU_END_ADDR 0x100FFFFF + +/* XTI configuration registers */ +#define XTI_CFG_REG_BASE_ADDR 0x101A0000 +#define XTI_CFG_REG_END_ADDR 0x101AFFFF + +/* Core APB Peripherals */ +#define CORE_APB_BASE_ADDR 0x101E0000 +#define CORE_APB_END_ADDR 0x101EFFFF + +/* DMA APB Peripherals */ +#define DMA_APB_BASE_ADDR 0x101F0000 +#define DMA_APB_END_ADDR 0x101FFFFF + +/* XTI (DSP OSMO/OSMOT address space) */ +#define XTI_DSP_BASE_ADDR 0x10220000 +#define XTI_DSP_END_ADDR 0x1022FFFF + +#endif /* defined(__STN_8815) */ + + +/*--------------------------------------------------------------------------*/ +#if defined(__STN_8820) + +/* STM (System Trace Module address space) */ +#define STM_BASE_ADDR 0x700F0000 +#define STM_END_ADDR 0x700FFFFF + +/* AHB2 Peripherals */ +#define AHB2_PERIPH_BASE_ADDR 0x70100000 +#define AHB2_PERIPH_END_ADDR 0x7010FFFF + +/* APB2 Peripherals */ +#define APB2_PERIPH_BASE_ADDR 0x70110000 +#define APB2_PERIPH_END_ADDR 0x7011FFFF + +/* APB1 Peripherals */ +#define APB1_PERIPH_BASE_ADDR 0x70120000 +#define APB1_PERIPH_END_ADDR 0x7012FFFF + +#endif /* defined(__STN_8820) */ + +/*--------------------------------------------------------------------------*/ +#if defined(__STN_8500) +/* STM (System Trace Module address space) */ +#define STM_BASE_ADDR 0x80100000 +#define STM_END_ADDR 0x8010FFFF + +#define HSEM_BASE_ADDR 0x80140000 +#define HSEM_END_ADDR 0x8014FFFF + +#define DMA_CTRL_BASE_ADDR 0x801C0000 +#define DMA_CTRL_END_ADDR 0x801C0FFF + + +#endif /* defined(__STN_8500) */ + +#endif /*__INC_NOMADIK_MAPPING_H */ diff --git a/drivers/staging/nmf-cm/share/semaphores/inc/hwsem_hwp.h b/drivers/staging/nmf-cm/share/semaphores/inc/hwsem_hwp.h new file mode 100644 index 00000000000..b573627beae --- /dev/null +++ b/drivers/staging/nmf-cm/share/semaphores/inc/hwsem_hwp.h @@ -0,0 +1,85 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_HWSEM_HWP_H +#define __INC_HWSEM_HWP_H + +#include <share/semaphores/inc/semaphores.h> + +#define CORE_ID_2_HW_CORE_ID(coreId) (1U << (coreId)) + +/* + * Definition of the number of hw semaphores into the Nomadik IP + */ +#define NUM_HW_SEMAPHORES 32 + + +/* + * Definition of how HSEM IP interrupts are interconnected with cores + */ +typedef enum { + HSEM_FIRST_INTR = 0, + HSEM_INTRA = HSEM_FIRST_INTR, + HSEM_INTRB = 1, + HSEM_INTRC = 2, + HSEM_INTRD = 3, + HSEM_INTRE = 4, + HSEM_MAX_INTR +} t_hw_semaphore_irq_id; + +/* + * Description of the registers of the HW Sem IP + */ +#define HSEM_INTRA_MASK (1<<(4+HSEM_INTRA)) +#define HSEM_INTRB_MASK (1<<(4+HSEM_INTRB)) +#define HSEM_INTRC_MASK (1<<(4+HSEM_INTRC)) +#define HSEM_INTRD_MASK (1<<(4+HSEM_INTRD)) +#define HSEM_INTRE_MASK (1<<(4+HSEM_INTRE)) + +typedef struct { + t_shared_reg imsc; + t_shared_reg ris; + t_shared_reg mis; + t_shared_reg icr; +} t_hsem_it_regs; + +typedef volatile struct { +#if defined(__STN_8500) + t_shared_reg cr; + t_shared_reg dummy; +#endif + t_shared_reg sem[NUM_HW_SEMAPHORES]; +#if defined(__STN_8820) + t_shared_reg RESERVED1[(0x90 - 0x80)>>2]; +#elif defined(__STN_8500) + t_shared_reg RESERVED1[(0x90 - 0x88)>>2]; +#else /* __STN_8820 or __STN_8500 -> _STN_8815 */ + t_shared_reg RESERVED1[(0x90 - 0x40)>>2]; +#endif /* __STN_8820 or __STN_8500 -> _STN_8815 */ + t_shared_reg icrall; + t_shared_reg RESERVED2[(0xa0 - 0x94)>>2]; + t_hsem_it_regs it[HSEM_MAX_INTR]; +#if defined(__STN_8820) || defined(__STN_8500) + t_shared_reg RESERVED3[(0x100 - 0xf0)>>2]; +#else /* __STN_8820 or __STN_8500 -> _STN_8815 */ + t_shared_reg RESERVED3[(0x100 - 0xe0)>>2]; +#endif /* __STN_8820 or __STN_8500 -> _STN_8815 */ + t_shared_reg itcr; + t_shared_reg RESERVED4; + t_shared_reg itop; + t_shared_reg RESERVED5[(0xfe0 - 0x10c)>>2]; + t_shared_reg pid0; + t_shared_reg pid1; + t_shared_reg pid2; + t_shared_reg pid3; + t_shared_reg pcid0; + t_shared_reg pcid1; + t_shared_reg pcid2; + t_shared_reg pcid3; +} t_hw_semaphore_regs, *tp_hw_semaphore_regs; + +#endif /* __INC_HWSEM_HWP_H */ diff --git a/drivers/staging/nmf-cm/share/semaphores/inc/semaphores.h b/drivers/staging/nmf-cm/share/semaphores/inc/semaphores.h new file mode 100644 index 00000000000..c72b64cd709 --- /dev/null +++ b/drivers/staging/nmf-cm/share/semaphores/inc/semaphores.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) ST-Ericsson SA 2010. All rights reserved. + * This code is ST-Ericsson proprietary and confidential. + * Any use of the code for whatever purpose is subject to + * specific written permission of ST-Ericsson SA. + */ + +#ifndef __INC_SHARED_SEMAPHORE_H +#define __INC_SHARED_SEMAPHORE_H + +#include <share/inc/nmf.h> + +typedef t_uint16 t_semaphore_id; + +/* + * HW semaphore allocation + * ----------------------- + * We want to optimize interrupt demultiplexing at dsp interrupt handler level + * so a good solution would be to have sequentially the semaphores for each neighbors + * + * STn8500 : + * --------- + * ARM <- SVA COMS => 0 + * ARM <- SIA COMS => 1 + * SVA <- ARM COMS => 2 + * SVA <- SIA COMS => 3 + * SIA <- ARM COMS => 4 + * SIA <- SVA COMS => 5 + + * The first neighbor is always the ARM, then the other ones (SVA,SIA) + */ + +/* + * Local semaphore allocation + * ----------------------- + * 0 : ARM <- DSP + * 1 : DSP <- ARM + */ + +#define NB_USED_HSEM_PER_CORE (NB_CORE_IDS - 1) +#define FIRST_NEIGHBOR_SEMID(coreId) ((coreId)*NB_USED_HSEM_PER_CORE) + +#endif /* __INC_SHARED_SEMAPHORE_H */ |